公开(公告)号：US10078544B2

公开(公告)日：2018-09-18

申请号：US14975751

申请日：2015-12-19

Applicant: Intel Corporation

Inventor： Clark N. Vandam ,  Balkaran Gill ,  Junho Song ,  Suriya Suriya Ashok Kumar ,  Kasyap Pasumarthi

IPC: G06F11/00 ,  G06F11/07 ,  G06F11/22 ,  G06F11/24 ,  G06F11/27

CPC classification number: G06F11/0793 ,  G06F11/0721 ,  G06F11/0751 ,  G06F11/079 ,  G06F11/2236 ,  G06F11/24 ,  G06F11/27

Abstract: An apparatus and method are described for an on-chip reliability controller. For example, one embodiment of a processor comprises: a set of one or more cores to execute instructions and process data; a reliability controller to perform one or more self-test/diagnostic operations, the reliability controller to aggregate reliability data resulting from the self-test/diagnostic operations; a reliability estimator integral to the reliability controller to use the aggregated reliability data to perform a probability analysis to determine reliability estimates for one or more components of the processor; and a control unit integral to the reliability controller to adjust one or more variables and/or circuitry related to operation of the processor responsive to the reliability estimates.

公开(公告)号：US10592331B2

公开(公告)日：2020-03-17

申请号：US16110381

申请日：2018-08-23

Applicant: Intel Corporation

Inventor： Clark N. Vandam ,  Balkaran Gill ,  Junho Song ,  Suriya Ashok Kumar ,  Kasyap Pasumarthi

IPC: G06F11/00 ,  G06F11/07 ,  G06F11/22 ,  G06F11/24 ,  G06F11/27

Abstract: An apparatus and method are described for an on-chip reliability controller. For example, one embodiment of a processor comprises: a set of one or more cores to execute instructions and process data; a reliability controller to perform one or more self-test/diagnostic operations, the reliability controller to aggregate reliability data resulting from the self-test/diagnostic operations; a reliability estimator integral to the reliability controller to use the aggregated reliability data to perform a probability analysis to determine reliability estimates for one or more components of the processor; and a control unit integral to the reliability controller to adjust one or more variables and/or circuitry related to operation of the processor responsive to the reliability estimates.