Apparatus and method for an on-chip reliability controller

    公开(公告)号:US10592331B2

    公开(公告)日:2020-03-17

    申请号:US16110381

    申请日:2018-08-23

    Abstract: An apparatus and method are described for an on-chip reliability controller. For example, one embodiment of a processor comprises: a set of one or more cores to execute instructions and process data; a reliability controller to perform one or more self-test/diagnostic operations, the reliability controller to aggregate reliability data resulting from the self-test/diagnostic operations; a reliability estimator integral to the reliability controller to use the aggregated reliability data to perform a probability analysis to determine reliability estimates for one or more components of the processor; and a control unit integral to the reliability controller to adjust one or more variables and/or circuitry related to operation of the processor responsive to the reliability estimates.

    Architecture for telemetry and adaptive lifetime control of integrated circuits

    公开(公告)号:US10114981B2

    公开(公告)日:2018-10-30

    申请号:US15396561

    申请日:2016-12-31

    Abstract: Apparatus, method, and system for remotely affecting the functionality and lifetime of an integrated circuit are described herein. One embodiment of a method includes: tracking a plurality of operational metrics relating to a monitored device, sending one or more of the plurality of operational metrics to a remote monitor and responsively receiving a command generated by the remote monitor, generating a threat level based on the plurality of operational metrics and the command, and performing a derating action based on the threat level. The command from the remote monitor may be generated by the remote monitor based, at least in part, on the one or more of the plurality of operational metrics. Alternatively, the command may be generated based on information obtained independently by the remote monitor and not based on the one or more of the plurality of operational metrics.

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