公开(公告)号：US20200249271A1

公开(公告)日：2020-08-06

申请号：US16265661

申请日：2019-02-01

Applicant: Intel Corporation

Inventor： Suriya Ashok Kumar ,  Ketul B. Sutaria ,  Stephen M. Ramey

IPC: G01R31/28 ,  H01L27/092 ,  H03K3/354 ,  H03K21/38 ,  G01R31/00

Abstract: Various embodiments provide a health monitor circuit including an n-type sensor to determine a first health indicator associated with n-type transistors of a circuit block and a p-type sensor to determine a second health indicator associated with p-type transistors of the circuit block. The n-type sensor and p-type sensor may be on a same die as the circuit block. The health monitor circuit may further include a control circuit to adjust one or more operating parameters, such as operating voltage and/or operating frequency, for the circuit block based on the first and second health indicators. Other embodiments may be described and claimed.

公开(公告)号：US09762241B1

公开(公告)日：2017-09-12

申请号：US15198124

申请日：2016-06-30

Applicant: Intel Corporation

Inventor： Charles Augustine ,  Suriya Ashok Kumar ,  Carlos Tokunaga ,  James W. Tschanz

IPC: H04L9/08 ,  H03K19/003 ,  H03K19/177 ,  H04L9/32

CPC classification number: H03K19/00315 ,  H03K3/0315 ,  H03K3/84 ,  H03K19/1776 ,  H04L9/3278

Abstract: Some embodiments include apparatus and methods using a first ring oscillator, a second ring oscillator, and circuit coupled to the first and second ring oscillators. The first ring oscillator includes a first memory cell and a first plurality of stages coupled to the first memory cell. The second ring oscillator includes a second memory cell and a second plurality of stages coupled to the second memory cell. The circuit includes a first input node coupled to an output node of the first ring oscillator and a second input node coupled to an output node of the second ring oscillator. In one of such embodiments, the circuit can operate to generate identification information to authenticate the apparatus.

公开(公告)号：US11099232B2

公开(公告)日：2021-08-24

申请号：US16265661

申请日：2019-02-01

Applicant: Intel Corporation

Inventor： Suriya Ashok Kumar ,  Ketul B. Sutaria ,  Stephen M. Ramey

IPC: G01R31/28 ,  H03K3/03 ,  G01R31/00

Abstract: Various embodiments provide a health monitor circuit including an n-type sensor to determine a first health indicator associated with n-type transistors of a circuit block and a p-type sensor to determine a second health indicator associated with p-type transistors of the circuit block. The n-type sensor and p-type sensor may be on a same die as the circuit block. The health monitor circuit may further include a control circuit to adjust one or more operating parameters, such as operating voltage and/or operating frequency, for the circuit block based on the first and second health indicators. Other embodiments may be described and claimed.

公开(公告)号：US10592331B2

公开(公告)日：2020-03-17

申请号：US16110381

申请日：2018-08-23

Applicant: Intel Corporation

Inventor： Clark N. Vandam ,  Balkaran Gill ,  Junho Song ,  Suriya Ashok Kumar ,  Kasyap Pasumarthi

IPC: G06F11/00 ,  G06F11/07 ,  G06F11/22 ,  G06F11/24 ,  G06F11/27

Abstract: An apparatus and method are described for an on-chip reliability controller. For example, one embodiment of a processor comprises: a set of one or more cores to execute instructions and process data; a reliability controller to perform one or more self-test/diagnostic operations, the reliability controller to aggregate reliability data resulting from the self-test/diagnostic operations; a reliability estimator integral to the reliability controller to use the aggregated reliability data to perform a probability analysis to determine reliability estimates for one or more components of the processor; and a control unit integral to the reliability controller to adjust one or more variables and/or circuitry related to operation of the processor responsive to the reliability estimates.