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公开(公告)号:US20230327618A1
公开(公告)日:2023-10-12
申请号:US17705641
申请日:2022-03-28
Applicant: Intel Corporation
Inventor: Ofir Degani , Assaf Ben-Bassat , Yishai Eilat , Naor Roi Shay , Limor Zohar
CPC classification number: H03F3/245 , H03F1/0227 , H03F3/45475
Abstract: Techniques are disclosed to instruct how a switched capacitor digital power amplifier (PA) is configured to operate using high supply voltage levels beyond twice the maximum voltage rating for any of the transistor terminals such as Vds/Vdg/Vsg. The digital PA has a topology that comprises a dual-feedback capacitive path that comprises a capacitive divider and a voltage stabilizing feedback path to selectively couple the capacitive divider to DC bias voltages.
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公开(公告)号:US20240113670A1
公开(公告)日:2024-04-04
申请号:US17957011
申请日:2022-09-30
Applicant: INTEL CORPORATION
Inventor: Ofir Degani , Naor Roi Shay , Assaf Ben-Bassat , Limor Zohar , Yishai Eilat
CPC classification number: H03F3/245 , H03F3/45475 , H04B1/04 , H03F2200/451 , H03F2203/45018
Abstract: For example, an apparatus may include an input to receive an input signal in a first voltage domain; a multi-mode power amplifier switchable between a plurality of power modes to generate an output signal based on the input signal; and an output to provide the output signal. For example, the multi-mode power amplifier may be configured to provide the output signal in the first voltage domain at a first power mode, and to provide the output signal in a second voltage domain at a second power mode. For example, a maximal voltage of the second voltage domain may be at least two times a maximal voltage of the first voltage domain.
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