公开(公告)号：US20230068318A1

公开(公告)日：2023-03-02

申请号：US17459986

申请日：2021-08-27

Applicant: Intel Corporation

Inventor： Richard Geiger ,  Georgios Panagopoulos ,  Luis Felipe Giles ,  Peter Baumgartner ,  Harald Gossner ,  Sansaptak Dasgupta ,  Marko Radosavljevic ,  Han Wui Then

IPC: H01L29/207 ,  H01L29/20 ,  H01L27/06 ,  H01L29/66

Abstract: Disclosed herein are IC devices, packages, and device assemblies that include III-N diodes with n-doped wells and capping layers. An example IC device includes a support structure and a III-N layer, provided over a portion of the support structure, the III-N layer including an n-doped well of a III-N semiconductor material having n-type dopants with a dopant concentration of at least 5×1017 dopants per cubic centimeter. The IC device further includes a first and a second electrodes and at least one capping layer. The first electrode interfaces a first portion of the n-doped well. The capping layer interfaces a second portion of the n-doped well and includes a semiconductor material with a dopant concentration below 1017 dopants per cubic centimeter. The second electrode is provided so that the capping layer is between the second portion of the n-doped well and the second electrode.