公开(公告)号：US11996814B2

公开(公告)日：2024-05-28

申请号：US17059491

申请日：2019-08-05

Applicant: Intel Corporation

Inventor： Matteo Camponeschi ,  Lukas Doerrer ,  Patrick Torta

IPC: H03H11/12 ,  H03H7/38 ,  H03M3/00

CPC classification number: H03H11/1286 ,  H03H7/38 ,  H03M3/424 ,  H03M3/438 ,  H03M3/458

Abstract: An active filter and an analog-to-digital converter (ADC) configured to suppress out-of-band peaking. An active filter may include an active device configured to provide a power gain to an input signal, a feedback network configured to connect an output of the active device to an input of the active device, and an input impedance network configured to couple the input signal to the input of the active device. A combination of the feedback network and the input impedance network is configured to provide frequency response properties of the active filter such that a frequency domain signal transfer function of the active filter has a constant in numerator.

公开(公告)号：US10594330B2

公开(公告)日：2020-03-17

申请号：US16349390

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Francesco Conzatti ,  Patrick Torta ,  Lukas Doerrer ,  Marco Bresciani ,  Claus Kropf

IPC: H03M1/06 ,  H03M3/00

Abstract: Methods adapted for digital-to-analog conversion compensation and systems are described. In a compensation method, inputs of a digital-to-analog converter (DAC) are adjusted to provide an even number inputs for the DAC. Further, one or more analog input signals are converted to generate one or more corresponding digital output signals. The one or more digital output signals are compensated to compensate for the adjustment of the inputs of the DAC.

公开(公告)号：US20190341923A1

公开(公告)日：2019-11-07

申请号：US16349390

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Francesco Conzatti ,  Patrick Torta ,  Lukas Doerrer ,  Marco Bresciani ,  Claus Kropf

IPC: H03M1/06 ,  H03M3/00

Abstract: Methods adapted for digital-to-analog conversion compensation and systems are described. In a compensation method, inputs of a digital-to-analog converter (DAC) are adjusted to provide an even number inputs for the DAC. Further, one or more analog input signals are converted to generate one or more corresponding digital output signals. The one or more digital output signals are compensated to compensate for the adjustment of the inputs of the DAC.