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公开(公告)号：US20250112147A1
公开(公告)日：2025-04-03
申请号：US18375306
申请日：2023-09-29
Applicant: Intel Corporation
Inventor： Xi Li , Chuanzhao Yu , Yazan Hejazin , Marco Bresciani , Hyun Yoon , Lichung Chang
IPC: H01L23/522 , H01L23/48 , H01L27/06
Abstract: An integrated circuit device with front- and back-side metals may include coils in interconnect structures on one or both sides of a semiconductor substrate. The coil(s) may include vias extending through (and coupling wires on both sides of) the substrate. The coil(s) may include multiple turns or loops. The coil(s) may be on one side, and parallel to, the substrate. Coils may be orthogonal or parallel to each other. A resistor may have smaller resistor segments on both sides of the substrate coupled by through-substrate vias. A capacitor may utilize through-substrate vias as plates. Through-substrate vias may inhibit eddy currents in the substrate. A cage of wires and through-substrate vias may shield devices within the cage from interfering fields external to the cage.
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公开(公告)号：US20230188178A1
公开(公告)日：2023-06-15
申请号：US17549409
申请日：2021-12-13
Applicant: Intel Corporation
Inventor： Wayne Ballantyne , Benjamin Jann , Marco Bresciani , Wei Chen , Chien-Hwa Tou
Abstract: A wireless communication device can include chains of circuitry, with at least one chain being a chain of transmitter circuitry to generate output radio frequency (RF) signals using baseband signals and at least one chain of receiver circuitry configured to receive RF signals. At least one chain can include a plurality of circuit blocks, a circuit block including at least one of oscillator circuitry, clocking circuitry, and phased lock loop (PLL) circuitry. The apparatus can include interconnect circuitry configured to couple one of the plurality of circuit blocks to a respective chain. Other systems, methods and apparatuses are described.
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公开(公告)号：US10594330B2
公开(公告)日：2020-03-17
申请号：US16349390
申请日：2017-09-29
Applicant: Intel Corporation
Inventor： Francesco Conzatti , Patrick Torta , Lukas Doerrer , Marco Bresciani , Claus Kropf
Abstract: Methods adapted for digital-to-analog conversion compensation and systems are described. In a compensation method, inputs of a digital-to-analog converter (DAC) are adjusted to provide an even number inputs for the DAC. Further, one or more analog input signals are converted to generate one or more corresponding digital output signals. The one or more digital output signals are compensated to compensate for the adjustment of the inputs of the DAC.
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公开(公告)号：US20190341923A1
公开(公告)日：2019-11-07
申请号：US16349390
申请日：2017-09-29
Applicant: Intel Corporation
Inventor： Francesco Conzatti , Patrick Torta , Lukas Doerrer , Marco Bresciani , Claus Kropf
Abstract: Methods adapted for digital-to-analog conversion compensation and systems are described. In a compensation method, inputs of a digital-to-analog converter (DAC) are adjusted to provide an even number inputs for the DAC. Further, one or more analog input signals are converted to generate one or more corresponding digital output signals. The one or more digital output signals are compensated to compensate for the adjustment of the inputs of the DAC.
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