公开(公告)号：US12190173B2

公开(公告)日：2025-01-07

申请号：US17213747

申请日：2021-03-26

Applicant: Intel Corporation

Inventor： Niharika Arlagadda Narasimharaju ,  Sudheer Nair ,  James Hermerding, II ,  Merwin Brown ,  Deepak Ganapathy ,  Fabian Garita Gonzalez

IPC: G06F9/50 ,  G06F1/28

Abstract: Methods, apparatus, systems and articles of manufacture for power sharing between discrete processors are disclosed. An example apparatus includes a thermal monitor to monitor temperatures of first and second discrete processors and a balance controller to, in response to a first temperature of the first processor satisfying a temperature threshold, adjust first and second power budgets allocated to the respective first and second processors.

公开(公告)号：US20230195198A1

公开(公告)日：2023-06-22

申请号：US17559918

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： Naoki Matsumura ,  Merwin Brown ,  Tod Schiff

IPC: G06F1/3234 ,  G06F1/3212 ,  G06F1/26

CPC classification number: G06F1/3234 ,  G06F1/3212 ,  G06F1/263

Abstract: Systems, apparatuses and methods may provide for technology that detects a condition with respect to a system including a processing unit, wherein the processing unit is to include a turbo operation mode and intermittently or regularly shortens a repeated active duration of the turbo operation mode in response to the condition. In one example, intermittently shortening the repeated active duration of the turbo operation mode includes modifying a duration setting a rate of occurrence setting, a power level ratio setting and/or a duty cycle setting.

公开(公告)号：US20210216377A1

公开(公告)日：2021-07-15

申请号：US17213747

申请日：2021-03-26

Applicant: Intel Corporation

Inventor： Niharika Arlagadda Narasimharaju ,  Sudheer Nair ,  James Hermerding, II ,  Merwin Brown ,  Deepak Ganapathy ,  Fabian Garita Gonzalez

IPC: G06F9/50 ,  G06F1/28

Abstract: Methods, apparatus, systems and articles of manufacture for power sharing between discrete processors are disclosed. An example apparatus includes a thermal monitor to monitor temperatures of first and second discrete processors and a balance controller to, in response to a first temperature of the first processor satisfying a temperature threshold, adjust first and second power budgets allocated to the respective first and second processors.