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公开(公告)号：US12278512B2
公开(公告)日：2025-04-15
申请号：US17132771
申请日：2020-12-23
Applicant: Intel Corporation
Inventor： Jeffrey Schline , Samantha Rao , Naoki Matsumura , Ramon Cancel Olmo , Tod Schiff , Arunthathi Chandrabose
IPC: H02J7/00 , G06F1/3212 , G06F1/3287
Abstract: A workload dependent load-sharing mechanism in a multi-battery system. The mechanism is an energy management system that operates in three modes—energy saving mode, balancer mode, and turbo mode. The energy saving mode is a normal mode where the multiple batteries provide power to their own set of loads with least resistive dissipation. In balancing mode, the batteries are connected through switches operating in active mode so that the current shared is inversely proportion to the corresponding battery state-of-charge. In turbo mode, both batteries are connected in parallel through switches (e.g., on-switches) to provide maximum power to a processor or load. A controller optimizes the sequence and charging rate for a hybrid battery to maximize both the charging current and charging speed of the battery, while enabling longer battery life. The hybrid battery comprises a fast charging battery and a high-energy density battery.
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公开(公告)号：US20160092393A1
公开(公告)日：2016-03-31
申请号：US14497925
申请日：2014-09-26
Applicant: Intel Corporation
Inventor： Chee Lim Nge , Tod Schiff , Vijayakumar Dibbad , Alan Hallberg
CPC classification number: G06F13/385 , G06F13/382 , G06F13/4068 , G06F13/4282
Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.
Abstract translation: 一些实施例包括具有耦合到串行总线的节点的装置和方法，以及控制器，以向第一电路路径和第二电路路径之一提供控制信号，以便改变位于第一电路路径和第二电路路径之间的节点处的信号的电终端 在控制器的第一模式期间通过第一电路路径进行第一电终接，并且在控制器的第二模式期间通过第二电路路径进行第二电终接。 控制器可以被布置为在第一和第二模式期间向第一和第二电路路径提供控制信号，而不在第一和第二模式期间从控制器向第一和第二电路路径提供另一个控制信号。
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公开(公告)号：US10204068B2
公开(公告)日：2019-02-12
申请号：US15901351
申请日：2018-02-21
Applicant: Intel Corporation
Inventor： Chee Lim Nge , Tod Schiff , Vijayakumar Dibbad , Alan Hallberg
Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.
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公开(公告)号：US20180181515A1
公开(公告)日：2018-06-28
申请号：US15901351
申请日：2018-02-21
Applicant: Intel Corporation
Inventor： Chee Lim Nge , Tod Schiff , Vijayakumar Dibbad , Alan Hallberg
CPC classification number: G06F13/385 , G06F13/382 , G06F13/4068 , G06F13/4282
Abstract: Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.
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公开(公告)号：US12199461B2
公开(公告)日：2025-01-14
申请号：US17338488
申请日：2021-06-03
Applicant: Intel Corporation
Inventor： Naoki Matsumura , Tod Schiff , Zhongsheng Wang , Chee Lim Nge , Ming-Chia Lee , Ivy Li , Brice Onken , Qiyong Brian Bian , John Valavi , Ling-shun Wong
Abstract: Software and/or hardware to monitor system usage including how long system ran on a battery or with AC adapter power. The software and/or hardware judges whether fast charging is needed and/or how much charge is needed, and optimizes battery charging settings.
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Patent Agency Ranking
公开(公告)号：US20230195198A1
公开(公告)日：2023-06-22
申请号：US17559918
申请日：2021-12-22
Applicant: Intel Corporation
Inventor： Naoki Matsumura , Merwin Brown , Tod Schiff
IPC: G06F1/3234 , G06F1/3212 , G06F1/26
CPC classification number: G06F1/3234 , G06F1/3212 , G06F1/263
Abstract: Systems, apparatuses and methods may provide for technology that detects a condition with respect to a system including a processing unit, wherein the processing unit is to include a turbo operation mode and intermittently or regularly shortens a repeated active duration of the turbo operation mode in response to the condition. In one example, intermittently shortening the repeated active duration of the turbo operation mode includes modifying a duration setting a rate of occurrence setting, a power level ratio setting and/or a duty cycle setting.
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公开(公告)号：US20220407317A1
公开(公告)日：2022-12-22
申请号：US17354939
申请日：2021-06-22
Applicant: Intel Corporation
Inventor： Naoki Matsumura , Aaron Gorius , Tod Schiff , Andrew Keates
IPC: H02J7/00
Abstract: A microcontroller, processor, and/or software (SW) monitors a battery degradation indicator such as battery State-Of-Health (SOH), impedance or other attributes, and calculates battery degradation rate and regulates burst power, battery charging speed and/or battery charging limit to meet users' expectation of battery service life. The microcontroller, processor, and/or SW increases the burst power, battery charging speed and/or battery charging limit when 1/SOH or impedance change rate (or related parameter) is smaller than expected and there is more longevity budget than expected. In another example, the microcontroller, processor, and/or SW decreases the burst power, battery charging speed and/or battery charging limit when 1/SOH or impedance change rate (or related parameter) is greater than expected and there is less longevity budget than expected.
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公开(公告)号：US20220224135A1
公开(公告)日：2022-07-14
申请号：US17338488
申请日：2021-06-03
Applicant: Intel Corporation
Inventor： Naoki Matsumura , Tod Schiff , Zhongsheng Wang , Chee Lim Nge , Ming-Chia Lee , Ivy Li , Brice Onken , Qiyong Brian Bian , John Valavi , Ling-shun Wong
Abstract: A software and/or hardware to monitor system usage including how long system ran on a battery or with an AC adapter. The software and/or hardware judges whether fast charging is needed and/or how much charge is needed, and optimizes battery charging settings.
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公开(公告)号：US20210135478A1
公开(公告)日：2021-05-06
申请号：US17132771
申请日：2020-12-23
Applicant: Intel Corporation
Inventor： Jeffrey Schline , Samantha Rao , Naoki Matsumura , Ramon Cancel Olmo , Tod Schiff , Arunthathi Chandrabose
IPC: H02J7/00 , G06F1/3212 , G06F1/3287
Abstract: A workload dependent load-sharing mechanism in a multi-battery system. The mechanism is an energy management system that operates in three modes—energy saving mode, balancer mode, and turbo mode. The energy saving mode is a normal mode where the multiple batteries provide power to their own set of loads with least resistive dissipation. In balancing mode, the batteries are connected through switches operating in active mode so that the current shared is inversely proportion to the corresponding battery state-of-charge. In turbo mode, both batteries are connected in parallel through switches (e.g., on-switches) to provide maximum power to a processor or load. A controller optimizes the sequence and charging rate for a hybrid battery to maximize both the charging current and charging speed of the battery, while enabling longer battery life. The hybrid battery comprises a fast charging battery and a high-energy density battery.
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公开(公告)号：US20200227933A1
公开(公告)日：2020-07-16
申请号：US16833113
申请日：2020-03-27
Applicant: Intel Corporation
Inventor： Tod Schiff , Teal Hand , Alexander Uan-Zo-Li
Abstract: Techniques and mechanisms for supplementing power delivery with a battery. In an embodiment, a voltage is provided at a first node with the battery to power a load circuit. A charger is coupled between the first node and a second node, wherein a capacitor is coupled to provide charge to the charger via the second node. In response to detecting a transition of the voltage below a threshold voltage level, controller logic operates switch circuitry of the charger to provide charge from the capacitor. Such operation maintains the voltage in a range of voltage levels which are each above a minimum voltage level required by the load. At least a portion of the range is below the threshold voltage level. In some embodiments, another voltage at the second node provides a basis for generating a control signal to throttle an operation of the load circuit.
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