公开(公告)号：US11269786B2

公开(公告)日：2022-03-08

申请号：US16045393

申请日：2018-07-25

Applicant: Intel Corporation

Inventor： Anatoli Bolotov ,  Mikhail Grinchuk ,  David M. Durham ,  Patrick Fleming

IPC: G06F21/00 ,  G06F12/14 ,  G06F21/44 ,  G06F21/78

Abstract: Systems, apparatus, and/or methods to provide memory data protection. In one example, authenticated encryption may be enhanced via a modification to an authentication code that is associated with encrypted data. The authentication code may be modified, for example, with a nonce value generated for a particular write to memory Decrypted data, generated from the encrypted data, may then be validated based on a modified authentication code. Moreover, data freshness control for data stored in the memory may be provided based on iterative authentication and re-encryption. In addition, a counter used to provide a nonce value may be managed to reduce a size of the counter and/or a growth of the counter.

公开(公告)号：US20210312045A1

公开(公告)日：2021-10-07

申请号：US17354138

申请日：2021-06-22

Applicant: Intel Corporation

Inventor： Anatoli Bolotov ,  Mikhail Grinchuk ,  Oleg Rodionov

IPC: G06F21/55 ,  G06F21/60

Abstract: An apparatus to facilitate mitigation of side-channel attacks in a computer system platform is disclosed. The apparatus comprises a cryptographic circuitry, including a plurality of crypto functional units (CFUs) to perform cryptographic algorithms; and jammer circuitry to generate noise to protect the plurality of CFUs from side-channel attacks.

公开(公告)号：US12174955B2

公开(公告)日：2024-12-24

申请号：US17354138

申请日：2021-06-22

Applicant: Intel Corporation

Inventor： Anatoli Bolotov ,  Mikhail Grinchuk ,  Oleg Rodionov

IPC: G06F21/55 ,  G06F21/60

Abstract: An apparatus to facilitate mitigation of side-channel attacks in a computer system platform is disclosed. The apparatus comprises a cryptographic circuitry, including a plurality of crypto functional units (CFUs) to perform cryptographic algorithms; and jammer circuitry to generate noise to protect the plurality of CFUs from side-channel attacks.

公开(公告)号：US20190050347A1

公开(公告)日：2019-02-14

申请号：US16045393

申请日：2018-07-25

Applicant: Intel Corporation

Inventor： Anatoli Bolotov ,  Mikhail Grinchuk ,  David M. Durham ,  Patrick Fleming

IPC: G06F12/14 ,  G06F21/44

Abstract: Systems, apparatus, and/or methods to provide memory data protection. In one example, authenticated encryption may be enhanced via a modification to an authentication code that is associated with encrypted data. The authentication code may be modified, for example, with a nonce value generated for a particular write to memory Decrypted data, generated from the encrypted data, may then be validated based on a modified authentication code. Moreover, data freshness control for data stored in the memory may be provided based on iterative authentication and re-encryption. In addition, a counter used to provide a nonce value may be managed to reduce a size of the counter and/or a growth of the counter.

公开(公告)号：US10725861B2

公开(公告)日：2020-07-28

申请号：US16022447

申请日：2018-06-28

Applicant: Intel Corporation

Inventor： Anatoli Bolotov ,  Mikhail Grinchuk ,  Rajat Agarwal

IPC: G06F11/10 ,  H03M13/11 ,  G06F3/06 ,  G11C7/24 ,  H03M13/00 ,  G11C29/52 ,  G11C29/04

Abstract: System and techniques for error correction code (ECC) memory security are described herein. A write request that includes data is received. An integrity check value (ICV) is computed for the data. Then, the write request is performed, including writing a representation of the data to a data area in memory and writing the ICV into an ECC area in memory. Here, the data area is addressable by a host and the ECC area corresponds to the data area via hardware of the memory.

公开(公告)号：US09177251B2

公开(公告)日：2015-11-03

申请号：US14156648

申请日：2014-01-16

Applicant: Intel Corporation

Inventor： Alexander Podkolzin ,  Lav Ivanovic ,  Anatoli Bolotov ,  Mikhail Grinchuk ,  Sergey Afonin

IPC: G06N5/02 ,  G06N5/04 ,  G06F7/02 ,  G06F17/30

CPC classification number: G06N5/022 ,  G06F7/02 ,  G06F17/30985 ,  G06F2207/025 ,  G06N5/047

Abstract: Disclosed is a method and apparatus for matching regular expressions. A buffer of symbols giving a number of the last occurrence positions of each symbol is maintained. When two constants match on either side of a regular expression operator, the buffer of symbols is queried to determine if a member of the complement of the regular expression operator occurred between the two constants. If so, then the operator was not satisfied. If not, then the operator was satisfied.

Abstract translation: 公开了一种用于匹配正则表达式的方法和装置。 维持每个符号的最后出现位置数的符号缓冲器。 当两个常数在正则表达式运算符的任一侧匹配时，查询符号缓冲区以确定正则表达式运算符的补码的成员是否在两个常量之间发生。 如果是这样，那么操作员不满意。 如果没有，那么操作员就满意了。