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公开(公告)号:US20230319133A1
公开(公告)日:2023-10-05
申请号:US18205984
申请日:2023-06-05
Applicant: Intel Corporation
Inventor: Patrick G. KUTCH , Carolyn WYBORNY , Ziye YANG
IPC: H04L67/101
CPC classification number: H04L67/101
Abstract: Examples described herein relate to a network interface device that includes a network interface and circuitry. In some examples, the circuitry is to receive a request to perform a service and select a servicing node based on network latency and/or proximity of the requested service to the network interface device. In some examples, a proximity of the requested service includes execution in the network interface device.
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公开(公告)号:US20210326221A1
公开(公告)日:2021-10-21
申请号:US17359530
申请日:2021-06-26
Applicant: Intel Corporation
Inventor: Francesc GUIM BERNAT , Karthik KUMAR , Alexander BACHMUTSKY , Patrick G. KUTCH , Marcos E. CARRANZA
Abstract: Examples described herein relate to a network interface device that comprises circuitry, when operational, to select a platform to execute a function and based on load of the platform, selectively cause the function to execute on one or more other platforms to attempt to achieve or finish before the time-to-completion. In some examples, the circuitry is to detect progress of function execution to determine whether completion of execution of the function is predicted to not finish within the time-to-completion and cause the function to execute on one or more other platforms based on completion of execution of the function predicted to not finish within the time-to-completion. In some examples, the circuitry is to select the one or more other platforms to execute the function based on one or more of: processor computing utilization, available memory capacity, available cache capacity, network availability, or malfunction of a processor, memory, and/or cache.
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公开(公告)号:US20220222117A1
公开(公告)日:2022-07-14
申请号:US17709289
申请日:2022-03-30
Applicant: Intel Corporation
Inventor: Patrick G. KUTCH , Francesc GUIM BERNAT , Andrey CHILIKIN , Brian P. JOHNSON
IPC: G06F9/50
Abstract: Examples describe techniques to expose application telemetry in a virtualized execution environment. Examples include a plurality of application executing within the virtualized execution environment writing telemetry data to a memory associated with virtual devices of a hardware device. Examples also include an orchestrator to read the telemetry data from the memory and use the telemetry data to make resource allocation decisions.
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公开(公告)号:US20210349820A1
公开(公告)日:2021-11-11
申请号:US15931476
申请日:2020-05-13
Applicant: Intel Corporation
Inventor: Patrick G. KUTCH , Andrey CHILIKIN
IPC: G06F12/0802 , G06F13/42
Abstract: Examples described herein relate to an offload processor to receive data for transmission using a network interface or received in a packet by a network interface. In some examples, the offload processor can include a packet storage controller to determine whether to store data in a buffer of the offload processing device or a system memory after processing by the offload processing device. In some examples, determine whether to store data in a buffer of the offload processor or a system memory is based on one or more of: available buffer space, latency limit associated with the data, priority associated with the data, or available bandwidth through an interface between the buffer and the system memory. In some examples, the offload processor is to receive a descriptor and specify a storage location of data in the descriptor, wherein the storage location is within the buffer or the system memory.
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公开(公告)号:US20210117360A1
公开(公告)日:2021-04-22
申请号:US17134361
申请日:2020-12-26
Applicant: Intel Corporation
Inventor: Patrick G. KUTCH , Andrey CHILIKIN , Niall D. MCDONNELL , Brian A. KEATING , Naveen LAKKAKULA , Ilango S. GANGA , Venkidesh KRISHNA IYER , Patrick FLEMING , Lokpraveen MOSUR
Abstract: Examples described herein include a system comprising: a processing unit package comprising: at least one core and at least one offload processing device communicatively coupled inline between the at least one core and a network interface controller, the at least one offload processing device configurable to perform packet processing. In some examples, the at least one offload processing device is to allow mapping of packet processing pipeline stages of networking applications among software running on the at least one core and the at least one offload processing device to permit flexible entry, exit, and re-entry points among the at least one core and the at least one offload processing device.
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公开(公告)号:US20210232528A1
公开(公告)日:2021-07-29
申请号:US17208744
申请日:2021-03-22
Applicant: Intel Corporation
Inventor: Patrick G. KUTCH , Andrey CHILIKIN , Jin YU , Cunming LIANG , Changpeng LIU , Ziye YANG , Gang CAO , Xiaodong LIU , Zhiguo WEN , Zhihua CHEN
Abstract: Examples described herein relate to an apparatus comprising: a descriptor format translator accessible to a driver. In some examples, the driver and descriptor format translator share access to transmit and receive descriptors. In some examples, based on a format of a descriptor associated with a device differing from a second format of descriptor associated with the driver, the descriptor format translator is to: perform a translation of the descriptor from the format to the second format and store the translated descriptor in the second format for access by the device. In some examples, the device is to access the translated descriptor; the device is to modify content of the translated descriptor to identify at least one work request; and the descriptor format translator is to translate the modified translated descriptor into the format and store the translated modified translated descriptor for access by the driver.
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公开(公告)号:US20200348973A1
公开(公告)日:2020-11-05
申请号:US16923856
申请日:2020-07-08
Applicant: Intel Corporation
Inventor: Patrick G. KUTCH
IPC: G06F9/50 , H04L12/26 , H04L12/911 , H04L12/917 , G06F9/455
Abstract: Examples described herein relate to a core executing an application, the application configured to write application performance measurements to one or more telemetry registers associated with the core. In some examples, the one or more telemetry registers can be designated for the application to store performance measurements from the application. In some examples, an orchestrator can read the one or more telemetry registers associated with the core. In some examples, the orchestrator selectively causes modification of resource allocation to the application based on read contents of the one or more telemetry registers. Utilization of the core can be 100% whereas the performance measurements can indicate a level of busyness of the application. In some examples, the performance measurements include one or more of: application busyness level, packets processed over a time interval, number of packets dropped over a time interval, number of video frames processed over a time interval, writes per second, read per second, or number of pending writes.
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公开(公告)号:US20200259763A1
公开(公告)日:2020-08-13
申请号:US16859792
申请日:2020-04-27
Applicant: Intel Corporation
Inventor: Francesc GUIM BERNAT , Patrick CONNOR , Patrick G. KUTCH , John J. BROWNE , Alexander BACHMUTSKY
IPC: H04L12/911 , H04L12/26 , H04L12/24
Abstract: Examples described herein relate to a device configured to allocate memory resources for packets received by the network interface based on received configuration settings. In some examples, the device is a network interface. Received configuration settings can include one or more of: latency, memory bandwidth, timing of when the content is expected to be accessed, or encryption parameters. In some examples, memory resources include one or more of: a cache, a volatile memory device, a storage device, or persistent memory. In some examples, based on a configuration settings not being available, the network interface is to perform one or more of: dropping a received packet, store the received packet in a buffer that does not meet the configuration settings, or indicate an error. In some examples, configuration settings are conditional where the settings are applied if one or more conditions is met.
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