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Patent Agency Ranking
公开(公告)号：US20190102097A1
公开(公告)日：2019-04-04
申请号：US15721351
申请日：2017-09-29
Applicant: Intel Corporation
Inventor： Aliasgar S. Madraswala , Xin Guo , Naveen Vittal Prabhu , Yu Du , Purval Shyam Sule
IPC: G06F3/06
Abstract: In one embodiment, an apparatus comprises a memory array and a controller. The controller is to receive a first read command specifying a read voltage offset profile identifier; identify a read voltage offset profile associated with the read voltage offset profile identifier, the read voltage offset profile comprising at least one read voltage offset; and perform a first read operation specified by the first read command using at least one read voltage adjusted according to the at least one read voltage offset of the read voltage offset profile.
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2.发明申请公开(公告)号：US20190304543A1
公开(公告)日：2019-10-03
申请号：US16291142
申请日：2019-03-04
Applicant: Intel Corporation
Inventor： Purval Shyam Sule , Aliasgar S. Madraswala , Shantanu R. Rajwade , Trupti Ramkrishna Bemalkhedkar , Leonard Aaron Turcios , Kristopher H. Gaewsky
Abstract: In one embodiment, an apparatus comprises a memory comprising a first group of memory cells, a second group of memory cells, and a controller to program one or more lower pages of data to the first group of memory cells; store dynamic start voltage information, the dynamic start voltage information indicative of a rate of programming of at least a portion of the first group of memory cells; determine a start program voltage based on the dynamic start voltage information; and apply the start program voltage to the second group of memory cells during a first program pass of a program operation, the program operation to program one or more lower pages of data to the second group of memory cells.
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3.发明授权公开(公告)号：US10224107B1
公开(公告)日：2019-03-05
申请号：US15720984
申请日：2017-09-29
Applicant: Intel Corporation
Inventor： Purval Shyam Sule , Aliasgar S. Madraswala , Shantanu R. Rajwade , Trupti Ramkrishna Bemalkhedkar , Leonard Aaron Turcios , Kristopher H. Gaewsky
Abstract: In one embodiment, an apparatus comprises a memory comprising a first group of memory cells, a second group of memory cells, and a controller to program one or more lower pages of data to the first group of memory cells; store dynamic start voltage information, the dynamic start voltage information indicative of a rate of programming of at least a portion of the first group of memory cells; determine a start program voltage based on the dynamic start voltage information; and apply the start program voltage to the second group of memory cells during a first program pass of a program operation, the program operation to program one or more lower pages of data to the second group of memory cells.
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4.发明授权公开(公告)号：US10714186B2
公开(公告)日：2020-07-14
申请号：US16291142
申请日：2019-03-04
Applicant: Intel Corporation
Inventor： Purval Shyam Sule , Aliasgar S. Madraswala , Shantanu R. Rajwade , Trupti Ramkrishna Bemalkhedkar , Leonard Aaron Turcios , Kristopher H. Gaewsky
Abstract: In one embodiment, an apparatus comprises a memory comprising a first group of memory cells, a second group of memory cells, and a controller to program one or more lower pages of data to the first group of memory cells; store dynamic start voltage information, the dynamic start voltage information indicative of a rate of programming of at least a portion of the first group of memory cells; determine a start program voltage based on the dynamic start voltage information; and apply the start program voltage to the second group of memory cells during a first program pass of a program operation, the program operation to program one or more lower pages of data to the second group of memory cells.
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公开(公告)号：US10268407B1
公开(公告)日：2019-04-23
申请号：US15721351
申请日：2017-09-29
Applicant: Intel Corporation
Inventor： Aliasgar S. Madraswala , Xin Guo , Naveen Vittal Prabhu , Yu Du , Purval Shyam Sule
Abstract: In one embodiment, an apparatus comprises a memory array and a controller. The controller is to receive a first read command specifying a read voltage offset profile identifier; identify a read voltage offset profile associated with the read voltage offset profile identifier, the read voltage offset profile comprising at least one read voltage offset; and perform a first read operation specified by the first read command using at least one read voltage adjusted according to the at least one read voltage offset of the read voltage offset profile.
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