公开(公告)号：US10714186B2

公开(公告)日：2020-07-14

申请号：US16291142

申请日：2019-03-04

Applicant: Intel Corporation

Inventor： Purval Shyam Sule ,  Aliasgar S. Madraswala ,  Shantanu R. Rajwade ,  Trupti Ramkrishna Bemalkhedkar ,  Leonard Aaron Turcios ,  Kristopher H. Gaewsky

IPC: G11C7/02 ,  G11C16/12 ,  G11C11/56 ,  G11C16/10 ,  G11C16/34 ,  G11C16/04

Abstract: In one embodiment, an apparatus comprises a memory comprising a first group of memory cells, a second group of memory cells, and a controller to program one or more lower pages of data to the first group of memory cells; store dynamic start voltage information, the dynamic start voltage information indicative of a rate of programming of at least a portion of the first group of memory cells; determine a start program voltage based on the dynamic start voltage information; and apply the start program voltage to the second group of memory cells during a first program pass of a program operation, the program operation to program one or more lower pages of data to the second group of memory cells.

公开(公告)号：US20190304543A1

公开(公告)日：2019-10-03

申请号：US16291142

申请日：2019-03-04

Applicant: Intel Corporation

Inventor： Purval Shyam Sule ,  Aliasgar S. Madraswala ,  Shantanu R. Rajwade ,  Trupti Ramkrishna Bemalkhedkar ,  Leonard Aaron Turcios ,  Kristopher H. Gaewsky

IPC: G11C16/12 ,  G11C16/10 ,  G11C11/56

Abstract: In one embodiment, an apparatus comprises a memory comprising a first group of memory cells, a second group of memory cells, and a controller to program one or more lower pages of data to the first group of memory cells; store dynamic start voltage information, the dynamic start voltage information indicative of a rate of programming of at least a portion of the first group of memory cells; determine a start program voltage based on the dynamic start voltage information; and apply the start program voltage to the second group of memory cells during a first program pass of a program operation, the program operation to program one or more lower pages of data to the second group of memory cells.

公开(公告)号：US10224107B1

公开(公告)日：2019-03-05

申请号：US15720984

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Purval Shyam Sule ,  Aliasgar S. Madraswala ,  Shantanu R. Rajwade ,  Trupti Ramkrishna Bemalkhedkar ,  Leonard Aaron Turcios ,  Kristopher H. Gaewsky

IPC: G11C16/06 ,  G11C16/12 ,  G11C16/34 ,  G11C16/04

Abstract: In one embodiment, an apparatus comprises a memory comprising a first group of memory cells, a second group of memory cells, and a controller to program one or more lower pages of data to the first group of memory cells; store dynamic start voltage information, the dynamic start voltage information indicative of a rate of programming of at least a portion of the first group of memory cells; determine a start program voltage based on the dynamic start voltage information; and apply the start program voltage to the second group of memory cells during a first program pass of a program operation, the program operation to program one or more lower pages of data to the second group of memory cells.