公开(公告)号：US20220190159A1

公开(公告)日：2022-06-16

申请号：US17122907

申请日：2020-12-15

Applicant: Intel Corporation

Inventor： Rajat PAUL ,  Willy RACHMADY ,  Jessica TORRES ,  Rambert NAHM ,  Ashish AGRAWAL ,  Siddharth CHOUKSEY ,  Gilbert DEWEY ,  Jack T. KAVALIEROS

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/167 ,  H01L29/165 ,  H01L29/66 ,  H01L27/12

Abstract: Integrated circuit structures having GeSnB source or drain structures, and methods of fabricating integrated circuit structures having GeSnB source or drain structures, are described. For example, an integrated circuit structure includes a vertical arrangement of horizontal nanowires. A gate stack is around the vertical arrangement of horizontal nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of horizontal nanowires, and a second epitaxial source or drain structure is at a second end of the vertical arrangement of horizontal nanowires. The first and second epitaxial source or drain structures include germanium, tin and boron.