公开(公告)号：US09398448B2

公开(公告)日：2016-07-19

申请号：US13715611

申请日：2012-12-14

Applicant: Intel Corporation

Inventor： Reinhard Stotzer ,  Kenneth Reese ,  Raviprakash Nagaraj

IPC: H04L29/06 ,  H04W12/02 ,  H04W12/08 ,  H04W12/06 ,  H04W12/04 ,  H04W12/12 ,  H04W84/18

CPC classification number: H04W12/02 ,  H04W12/04 ,  H04W12/06 ,  H04W12/08 ,  H04W12/12 ,  H04W84/18

Abstract: Systems, methods, and devices are directed to an electronic device that includes a first wireless communication module configured to facilitate transmission and reception of data via a wireless communication link and a first secure element while a wireless communication device includes a processor, an operating system executed by the processor, a second wireless communication module configured to facilitate transmission and reception of data via the wireless communication link, and a second secure element. The second secure element exchanges information with the first secure element via the wireless communication link to establish a secure channel within the wireless communication link, and the wireless communication device employs logic configured to route the data to the second secure element for processing prior to forwarding the data to the operating system, upon establishing the secure channel.

Abstract translation: 系统，方法和设备涉及电子设备，其包括第一无线通信模块，其被配置为便于在无线通信设备包括处理器的同时通过无线通信链路和第一安全元件传输和接收数据，执行的操作系统 通过处理器，第二无线通信模块被配置为便于通过无线通信链路传输和接收数据，以及第二安全元件。 所述第二安全元件经由所述无线通信链路与所述第一安全元件交换信息，以在所述无线通信链路内建立安全通道，并且所述无线通信设备使用被配置为将数据路由到所述第二安全元件以进行处理的逻辑， 建立安全通道后，向操作系统提供数据。

公开(公告)号：US09881300B2

公开(公告)日：2018-01-30

申请号：US14670871

申请日：2015-03-27

Applicant: Intel Corporation

Inventor： Kenneth W. Reese ,  Raviprakash Nagaraj ,  Leonard Goodell ,  James L. Fafrak

IPC: H04L29/00 ,  G06Q20/38 ,  G06Q20/40 ,  G06F21/86 ,  G06F21/53 ,  G06F21/60 ,  H04L29/06 ,  H04L9/08

CPC classification number: G06Q20/3829 ,  G06F21/53 ,  G06F21/602 ,  G06F21/86 ,  G06F2221/2107 ,  G06F2221/2143 ,  G06Q20/4012 ,  G06Q2220/00 ,  H04L9/0822 ,  H04L9/0866 ,  H04L9/0894 ,  H04L63/0853 ,  H04L2209/56 ,  H04L2463/062 ,  H04L2463/102

Abstract: Technologies for split key security include a payment device to generate a key encryption key and a first key encryption key part. The payment device generates a second key encryption key part based on the key encryption key and the first key encryption key part and deletes the key encryption key in response to generating the second key encryption key part. Further, the payment device stores the first key encryption key part to a secure memory of a security co-processor of the payment device and the second key encryption key part to a secure memory of a secondary processor of the payment device. The secondary processor is electrically coupled to a backup energy source.