公开(公告)号：US11016549B2

公开(公告)日：2021-05-25

申请号：US15870629

申请日：2018-01-12

Applicant: Intel Corporation

Inventor： Poh Thiam Teoh ,  Mikal C. Hunsaker ,  Su Wei Lim ,  Gim Chong Lee ,  Hooi Kar Loo ,  Shashitheren Kerisnan ,  Siang Lin Tan ,  Ming Chew Lee ,  Ngeok Kuan Wai ,  Li Len Lim

IPC: G06F1/26 ,  G06F1/10 ,  G06F13/42

Abstract: Aspects of the embodiments are directed to systems, methods, and apparatuses for controlling power management states using a clock request message across a 3.3 volt GPIO pin. Systems can include a CPU root port to transmit to a platform controller hub (PCH) compliant with a PCIe protocol, a first clock request message, the first clock request message comprising a first bit set to assert a clock request transmit (CLKREQ TX assert) on a 3.3 volt general purpose input/output (GPIO) pin local to the PCH; detect that a connected device is entering into a power management state; and transmit, from the CPU root port, to the PCH, a second clock request message, the second clock request message comprising the first bit set to deassert the clock request transmit (CLKREQ TX deassert) and a second bit to assert a clock request protocol (CLKREQ#) on a 3.3 volt GPIO pin.

公开(公告)号：US10311000B2

公开(公告)日：2019-06-04

申请号：US15721560

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Siang Lin Tan ,  Su Wei Lim ,  Ming Chew Lee ,  Ofer Nathan

IPC: G06F13/20 ,  G06F13/38 ,  G06F13/40 ,  G06F13/42

Abstract: An apparatus is provided which comprises: an input/output (I/O) port; an adaptor; a physical layer to interface between the I/O port and the adaptor; a first controller associated with a first type of communication; and a second controller associated with a second type of communication, wherein the adaptor is to selectively couple the I/O port, via the physical layer, to one of the first controller or the second controller, based at least in part on a type of device coupled to the I/O port.

公开(公告)号：US20190102335A1

公开(公告)日：2019-04-04

申请号：US15721560

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Siang Lin Tan ,  Su Wei Lim ,  Ming Chew Lee ,  Ofer Nathan

IPC: G06F13/40 ,  G06F13/42 ,  G06F13/20

Abstract: An apparatus is provided which comprises: an input/output (I/O) port; an adaptor; a physical layer to interface between the I/O port and the adaptor; a first controller associated with a first type of communication; and a second controller associated with a second type of communication, wherein the adaptor is to selectively couple the I/O port, via the physical layer, to one of the first controller or the second controller, based at least in part on a type of device coupled to the I/O port.