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公开(公告)号：US10861424B2
公开(公告)日：2020-12-08
申请号：US16269958
申请日：2019-02-07
Applicant: Intel Corporation
Inventor： Ajay Saini , Yong-Joon Park , Sravan Akepati
Abstract: In an embodiment, a computing device includes a processor and a machine-readable storage medium storing instructions. The instructions may be executable by the hardware processor to: monitor a user input device during presentation of video frames on a display device with a refresh rate at a first level; determine whether a time period since a last user interaction with the user input device exceeds a time threshold; and reduce the refresh rate of the display device to a second level in response to a determination that the time period since the last user interaction exceeds the time threshold. Other embodiments are described and claimed.
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Patent Agency Ranking
公开(公告)号：US11921558B1
公开(公告)日：2024-03-05
申请号：US18060002
申请日：2022-11-30
Applicant: Intel Corporation
Inventor： Venkateshan Udhayan , Sravan Akepati , Ashraf H. Wadaa , Shahrnaz Azizi , Kristoffer Fleming , Ajay Gupta , Binu John
IPC: G06F1/28 , G06F15/173
CPC classification number: G06F1/28 , G06F15/17331
Abstract: In one embodiment, a processor includes: a plurality of cores to execute instructions; a power controller to control power consumption of the plurality of cores, the power controller to receive network traffic metadata from a classifier and control the power consumption of at least one of the plurality of cores based at least in part on the network traffic metadata; and a hardware feedback circuit coupled to the plurality of cores, the hardware feedback circuit to determine hardware feedback information comprising an energy efficiency capability and a performance capability of at least some of the plurality of cores based at least in part on the network traffic metadata. Other embodiments are described and claimed.
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公开(公告)号：US12223223B2
公开(公告)日：2025-02-11
申请号：US17210912
申请日：2021-03-24
Applicant: Intel Corporation
Inventor： Ajay Saini , Prashant Solanki , Bharath Prabhu Perdoor , Yong-Joon Park , Sravan Akepati
Abstract: Examples described herein relate to a display engine. In some examples, at least one processor is to generate one or more planes of a frame and store the generated one or more planes of a frame into the at least one memory. In some examples, the at least one processor is to determine whether a plane in the frame is a candidate plane for compression. In some examples, for the candidate plane for compression, based on the candidate plane not being subject to compression, the at least one processor is to adjust a plane level of the candidate plane to subject the candidate plane to compression. In some examples, the plane level of the candidate plane to subject the candidate plane to compression is a bottom most level. In some examples, for the candidate plane for compression, based on the candidate plane not being subject to compression and the candidate plane including content that would be occluded by an upper level plane, the at least one processor is to retain a plane level of the candidate plane. In some examples, for the candidate plane for compression, based on the candidate plane not being subject to compression and the candidate plane including content that would not be occluded by an upper level plane, the at least one processor is to adjust the plane level of the candidate plane to a bottom most level.
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公开(公告)号：US20190172427A1
公开(公告)日：2019-06-06
申请号：US16269958
申请日：2019-02-07
Applicant: Intel Corporation
Inventor： Ajay Saini , Yong-Joon Park , Sravan Akepati
Abstract: In an embodiment, a computing device includes a processor and a machine-readable storage medium storing instructions. The instructions may be executable by the hardware processor to: monitor a user input device during presentation of video frames on a display device with a refresh rate at a first level; determine whether a time period since a last user interaction with the user input device exceeds a time threshold; and reduce the refresh rate of the display device to a second level in response to a determination that the time period since the last user interaction exceeds the time threshold. Other embodiments are described and claimed.
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公开(公告)号：US10796626B2
公开(公告)日：2020-10-06
申请号：US16269881
申请日：2019-02-07
Applicant: Intel Corporation
Inventor： Ajay Saini , Yong-Joon Park , Sravan Akepati
Abstract: In an embodiment, a computing device includes a processor and a machine-readable storage medium storing instructions. The instructions may be executable by the hardware processor to: receive a request for an expanded refresh rate that is not supported by a display device; in response to the received request, determine a native refresh rate that is supported by a display device; mask a plurality of interrupts generated by display hardware at the determined native refresh rate; and send, at the requested expanded refresh rate, a plurality of emulated interrupts to an operating system in place of the masked plurality of interrupts generated by the display hardware. Other embodiments are described and claimed.
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公开(公告)号：US20190172388A1
公开(公告)日：2019-06-06
申请号：US16269881
申请日：2019-02-07
Applicant: Intel Corporation
Inventor： Ajay Saini , Yong-Joon Park , Sravan Akepati
IPC: G09G3/22 , G09G5/393 , G06F9/30 , H03K19/177 , G06F3/041
CPC classification number: G09G3/22 , G06F3/0412 , G06F9/30018 , G06F9/30043 , G09G5/001 , G09G5/005 , G09G5/363 , G09G5/393 , G09G2360/02 , G09G2360/08 , G09G2360/121 , G09G2360/125 , H03K19/17724
Abstract: In an embodiment, a computing device includes a processor and a machine-readable storage medium storing instructions. The instructions may be executable by the hardware processor to: receive a request for an expanded refresh rate that is not supported by a display device; in response to the received request, determine a native refresh rate that is supported by a display device; mask a plurality of interrupts generated by display hardware at the determined native refresh rate; and send, at the requested expanded refresh rate, a plurality of emulated interrupts to an operating system in place of the masked plurality of interrupts generated by the display hardware. Other embodiments are described and claimed.
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