公开(公告)号：US20240354043A1

公开(公告)日：2024-10-24

申请号：US18648737

申请日：2024-04-29

申请人： Intel Corporation

发明人： Eric J. Asperheim ,  Subramaniam Maiyuran ,  Kiran C. Veernapu ,  Sanjeev S. Jahagirdar ,  Balaji Vembu ,  Devan Burke ,  Philip R. Laws ,  Kamal Sinha ,  Abhishek R. Appu ,  Elmoustapha Ould-Ahmed-Vall ,  Peter L. Doyle ,  Joydeep Ray ,  Travis T. Schluessler ,  John H. Feit ,  Nikos Kaburlasos ,  Jacek Kwiatkowski ,  Altug Koker

IPC分类号： G06F3/14 ,  G06F3/01 ,  G06F3/0484 ,  G09G5/00 ,  G09G5/391

CPC分类号： G06F3/1438 ,  G06F3/013 ,  G06F3/0484 ,  G09G5/391 ,  G09G5/001 ,  G09G2340/0435 ,  G09G2352/00 ,  G09G2354/00 ,  G09G2360/08 ,  G09G2360/121

摘要： In accordance with some embodiments, the render rate is varied across and/or up and down the display screen. This may be done based on where the user is looking in order to reduce power consumption and/or increase performance. Specifically the screen display is separated into regions, such as quadrants. Each of these regions is rendered at a rate determined by at least one of what the user is currently looking at, what the user has looked at in the past and/or what it is predicted that the user will look at next. Areas of less focus may be rendered at a lower rate, reducing power consumption in some embodiments.

公开(公告)号：US12056788B2

公开(公告)日：2024-08-06

申请号：US17684187

申请日：2022-03-01

申请人： Intel Corporation

发明人： Abhishek R. Appu ,  Altug Koker ,  Linda L. Hurd ,  Dukhwan Kim ,  Mike B. Macpherson ,  John C. Weast ,  Feng Chen ,  Farshad Akhbari ,  Narayan Srinivasa ,  Nadathur Rajagopalan Satish ,  Joydeep Ray ,  Ping T. Tang ,  Michael S. Strickland ,  Xiaoming Chen ,  Anbang Yao ,  Tatiana Shpeisman

IPC分类号： G06T1/20 ,  G06F3/14 ,  G06F9/30 ,  G06F9/38 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/084 ,  G06T15/00 ,  G09G5/36 ,  G06T15/04

CPC分类号： G06T1/20 ,  G06F3/14 ,  G06F9/3001 ,  G06F9/30014 ,  G06F9/3017 ,  G06F9/3887 ,  G06F9/3895 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/084 ,  G06T15/005 ,  G09G5/363 ,  G06F9/3851 ,  G06T15/04 ,  G09G2360/06 ,  G09G2360/08 ,  G09G2360/121

摘要： An apparatus to facilitate compute optimization is disclosed. The apparatus includes a mixed precision core including mixed-precision execution circuitry to execute one or more of the mixed-precision instructions to perform a mixed-precision dot-product operation comprising to perform a set of multiply and accumulate operations.

公开(公告)号：US11908381B2

公开(公告)日：2024-02-20

申请号：US17998124

申请日：2021-05-14

申请人： Snap Inc.

发明人： Howard V. Goetz ,  Glen Sands

IPC分类号： G09G3/20

CPC分类号： G09G3/2096 ,  G09G2360/121

摘要： A display driver device (210) receives a downloadable “sequence” for dynamically reconfiguring displayed image characteristics in an image system. The display driver device comprises one or more storage devices, for example, memory devices, for storing image data (218) and portions of drive sequences (219) that are downloaded and/or updated in real time depending on various inputs (214).

公开(公告)号：US11798450B2

公开(公告)日：2023-10-24

申请号：US17256094

申请日：2020-01-19

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Xitong Ma ,  Lihua Geng ,  Yanfu Li

IPC分类号： G09G3/20 ,  G09G5/36 ,  G09G5/399

CPC分类号： G09G3/20 ,  G09G5/363 ,  G09G5/399 ,  G09G2310/08 ,  G09G2360/121 ,  G09G2360/128

摘要： A display driving device and a control method thereof, and a display device. The control method includes: generating, by the master processing chip, a read/write synchronization signal, and receiving, by each of the slave processing chip, the read/write synchronization signal; in response to the read/write synchronization signal, caching, by the master processing chip, the received display data of the current to-be-displayed frame image into the frame address of the corresponding memory, reading and processing cached display data of a previous to-be-displayed frame image and transmitting the processed display data; and in response to the read/write synchronization signal, caching synchronously, by each of the slave processing chip, the received display data of the current to-be-displayed frame image into the frame address of the corresponding memory, and reading and processing synchronously cached display data of the previous to-be-displayed frame image and transmitting the processed display data.

公开(公告)号：US20230197030A1

公开(公告)日：2023-06-22

申请号：US17557975

申请日：2021-12-21

申请人： Intel Corporation

发明人： Chandra Mohan Konduru

IPC分类号： G09G5/00 ,  G09G5/02

CPC分类号： G09G5/006 ,  G09G5/026 ,  G09G2320/0247 ,  G09G2370/22 ,  G09G2360/121 ,  G09G2310/08 ,  G09G2360/18

摘要： One embodiment provides a graphics processor device that includes circuitry configured to detect a connection of a second display device to a display subsystem of the graphics processor while a first display device of the graphics subsystem is active, write pre-determined pixel data to a reserved portion of memory associated with the display subsystem, configure timings for the second display device while resources allocated to the first display device remain available to the first display device, display the pre-determined pixel data from the reserved portion of the memory on the second display device during reallocation of the resources of the display subsystem to enable output the framebuffer data to the second display device, and transition the second display device from the display of the pixel data in the reserved portion of the memory to the display of the framebuffer data after resources of the display subsystem are reallocated.

公开(公告)号：US20230142472A1

公开(公告)日：2023-05-11

申请号：US17959374

申请日：2022-10-04

申请人： Intel Corporation

发明人： Eric J. Asperheim ,  Subramaniam Maiyuran ,  Kiran C. Veernapu ,  Sanjeev S. Jahagirdar ,  Balaji Vembu ,  Devan Burke ,  Philip R. Laws ,  Kamal Sinha ,  Abhishek R. Appu ,  Elmoustapha Ould-Ahmed-Vall ,  Peter L. Doyle ,  Joydeep Ray ,  Travis T. Schluessler ,  John H. Feit ,  Nikos Kaburlasos ,  Jacek Kwiatkowski ,  Altug Koker

IPC分类号： G06F3/14 ,  G06F3/01 ,  G09G5/391 ,  G06F3/0484

CPC分类号： G06F3/1438 ,  G06F3/013 ,  G09G5/391 ,  G06F3/0484 ,  G09G2354/00 ,  G09G2352/00 ,  G09G2360/08 ,  G09G2340/0435 ,  G09G2360/121 ,  G09G5/001

摘要： In accordance with some embodiments, the render rate is varied across and/or up and down the display screen. This may be done based on where the user is looking in order to reduce power consumption and/or increase performance. Specifically the screen display is separated into regions, such as quadrants. Each of these regions is rendered at a rate determined by at least one of what the user is currently looking at, what the user has looked at in the past and/or what it is predicted that the user will look at next. Areas of less focus may be rendered at a lower rate, reducing power consumption in some embodiments.

公开(公告)号：US20180293965A1

公开(公告)日：2018-10-11

申请号：US15482535

申请日：2017-04-07

申请人： Intel Corporation

发明人： BALAJI VEMBU ,  JASON TANNER ,  JOYDEEP RAY ,  ALTUG KOKER ,  ABHISHEK R. APPU ,  PATTABHIRAMAN K

IPC分类号： G09G5/395 ,  G06F9/455 ,  G06T1/60 ,  G09G5/36 ,  G06T15/00 ,  H04N19/42 ,  G06T1/20 ,  G06T9/00

CPC分类号： G09G5/395 ,  G06F3/1423 ,  G06F9/452 ,  G06F9/45533 ,  G06T1/20 ,  G06T1/60 ,  G06T9/004 ,  G06T15/005 ,  G09G3/003 ,  G09G5/36 ,  G09G5/363 ,  G09G2340/02 ,  G09G2352/00 ,  G09G2360/08 ,  G09G2360/121 ,  G09G2370/022 ,  H04N19/42

摘要： An apparatus and method are described for efficiently rendering an transmitting to a remote display. For example, one embodiment of a remote display apparatus comprises: a display engine to render a sequence of video images; an encoder to compress the sequence of video images to generate a sequence of compressed video images; a network interface controller to transmit the compressed video images over a network link to a remote display; a plurality of buffer pointer registers to store read pointers and write pointers identifying read locations and write locations, respectively, in a frame buffer and a compressed stream buffer; a central processing unit (CPU) to initialize the read pointers and write pointers for processing one or more of the video images; and the display engine to access a first write pointer to write to a specified location in the frame buffer, the encoder to begin reading from the frame buffer based on a first read pointer value, the encoder to write to the compressed stream buffer based on a second write pointer value, and the network interface controller to read from the compressed stream buffer based on a second read pointer value, the first and second write and read pointer values to be updated without intervention from the CPU as the display engine writes to the frame buffer, the encoder reads from the frame buffer and writes to the compressed stream buffer, and the network interface controller reads from the compressed stream buffer.

公开(公告)号：US10062133B1

公开(公告)日：2018-08-28

申请号：US15007123

申请日：2016-01-26

申请人： Google LLC

发明人： Parthsarthi Mishra ,  Madhur Khandelwal ,  Zihao Wang

IPC分类号： G09G5/39 ,  G06T1/00 ,  G06T3/40 ,  G06T11/60 ,  G06F1/16 ,  G06F3/06

CPC分类号： G06T1/0007 ,  G06F1/163 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/068 ,  G06F3/14 ,  G06T3/40 ,  G06T11/60 ,  G09G5/40 ,  G09G2360/121 ,  G09G2370/022

摘要： Implementations generally relate to retrieving images from a device for consumption by the receiving device. In some implementations, a computing device may receive from a communication device an update to a collection of images including at least one image not previously received in a prior version of the collection. The computing device may store in long term memory the update to the collection and copy at least one of the images from the update to a non-persistent memory. The images in non-persistent memory may not exceed a maximum threshold. In response to the computing device changing from inactive to active, the computing device may display an image from non-persistent memory as a background image on the computing device. In further response to a minimum threshold number of images in non-persistent memory, the computing device may copy at least one of the new images to non-persistent memory.

公开(公告)号：US10055877B2

公开(公告)日：2018-08-21

申请号：US15386145

申请日：2016-12-21

申请人： Imagination Technologies Limited

发明人： Jonathan Redshaw ,  Yoong Chert Foo

IPC分类号： G06F9/50 ,  G06T1/20 ,  G06T15/40 ,  G06T15/00 ,  H04L29/08 ,  H04L12/26 ,  G06T17/10 ,  G06T15/04 ,  G06T15/80 ,  G06T17/20 ,  G06T11/40

CPC分类号： G06T15/005 ,  G06F9/505 ,  G06F9/5083 ,  G06T1/20 ,  G06T1/60 ,  G06T11/40 ,  G06T15/04 ,  G06T15/40 ,  G06T15/80 ,  G06T17/10 ,  G06T17/20 ,  G09G2360/121 ,  G09G2360/122 ,  H04L43/16 ,  H04L67/2842

摘要： A graphics processing system processes primitive fragments using a rendering space which is sub-divided into tiles. The graphics processing system comprises processing engines configured to apply texturing and/or shading to primitive fragments. The graphics processing system also comprises a cache system for storing graphics data for primitive fragments, the cache system including multiple cache subsystems. Each of the cache subsystems is coupled to a respective set of one or more processing engines. The graphics processing system also comprises a tile allocation unit which operates in one or more allocation modes to allocate tiles to processing engines. The allocation mode(s) include a spatial allocation mode in which groups of spatially adjacent tiles are allocated to the processing engines according to a spatial allocation scheme, which ensures that each of the groups of spatially adjacent tiles is allocated to a set of processing engines which are coupled to the same cache subsystem.

公开(公告)号：US10002580B2

公开(公告)日：2018-06-19

申请号：US15299515

申请日：2016-10-21

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Tatsuji Nishijima ,  Seiichi Yoneda ,  Takuro Ohmaru ,  Jun Koyama

IPC分类号： H01L29/10 ,  G09G3/36 ,  H01L33/16 ,  H01L27/12 ,  G09G5/393 ,  G09G5/395 ,  H01L27/105 ,  H01L29/24 ,  H01L29/786 ,  G02F1/1362

CPC分类号： G09G3/3648 ,  G02F2001/136295 ,  G09G3/3614 ,  G09G3/3677 ,  G09G5/393 ,  G09G5/395 ,  G09G2300/0842 ,  G09G2310/0264 ,  G09G2330/021 ,  G09G2330/022 ,  G09G2360/121 ,  H01L27/1052 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7869 ,  H01L33/16

摘要： In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.