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公开(公告)号:US20220215147A1
公开(公告)日:2022-07-07
申请号:US17703181
申请日:2022-03-24
Applicant: Intel Corporation
Inventor: Teik Wah Lim , Rajiv Mongia , Archanna Srinivasan , Mahesh A. Iyer
IPC: G06F30/32 , G06F30/343
Abstract: An integrated circuit system includes a temperature sensor circuit that generates an output indicative of a temperature in an integrated circuit. The integrated circuit system also includes a temperature management controller circuit that compares the temperature indicated by the output of the temperature sensor circuit to a temperature threshold. The integrated circuit system further includes temperature reduction circuitry and/or design compilation techniques and partial or full reconfiguration that controls the temperature in the integrated circuit system. The temperature management controller circuit causes the temperature reduction circuitry to reduce the temperature in response to the temperature indicated by the output of the temperature sensor circuit exceeding the temperature threshold. The temperature sensor circuit, the temperature management controller circuit, and the temperature reduction circuitry may be implemented by soft logic circuits, hard logic circuits, or any combination thereof.
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公开(公告)号:US10530367B2
公开(公告)日:2020-01-07
申请号:US16235956
申请日:2018-12-28
Applicant: Intel Corporation
Inventor: Chooi Pei Lim , Teik Wah Lim , Boon Haw Ooi , Keong Hong Oh
IPC: H03K19/177 , G06F17/50
Abstract: The disclosure relates to systems and methods for sector-to-sector and die-to-die clock synchronization in programmable logic devices. The methods and systems may employ phase difference detector and programmable delay elements to minimize skews in the clock tree and facilitate timing closure of time-critical paths and increase in operating frequencies.
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公开(公告)号:US20240027279A1
公开(公告)日:2024-01-25
申请号:US18476702
申请日:2023-09-28
Applicant: Intel Corporation
Inventor: Krishnakumar Varadarajan , Aurelien Mozipo , Juan Cevallos Palomeque , Teik Wah Lim , Aanandh Balasubramanian
CPC classification number: G01K1/026 , G01K1/024 , G01K3/08 , G01K2217/00 , G01K2213/00
Abstract: A method is provided for thermally monitoring an integrated circuit during operation of the integrated circuit. The method includes receiving a measurement of a temperature in a circuit design for the integrated circuit from a temperature sensor, and determining a hottest temperature in the circuit design based on the measurement of the temperature. A non-transitory computer readable storage medium includes computer readable instructions stored thereon for causing a computing system to receive a measurement of a first temperature in a circuit design for an integrated circuit from a temperature sensor, and determine a second temperature of a cold spot in an active region of the circuit design by adjusting the measurement of the first temperature generated by the temperature sensor by an offset.
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公开(公告)号:US20190140647A1
公开(公告)日:2019-05-09
申请号:US16235956
申请日:2018-12-28
Applicant: Intel Corporation
Inventor: Chooi Pei Lim , Teik Wah Lim , Boon Haw Ooi , Keong Hong Oh
IPC: H03K19/177 , G06F17/50
Abstract: The disclosure relates to systems and methods for sector-to-sector and die-to-die clock synchronization in programmable logic devices. The methods and systems may employ phase difference detector and programmable delay elements to minimize skews in the clock tree and facilitate timing closure of time-critical paths and increase in operating frequencies.
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