公开(公告)号：US20210408257A1

公开(公告)日：2021-12-30

申请号：US16911705

申请日：2020-06-25

Applicant: Intel Corporation

Inventor： Nicole THOMAS ,  Michael K. HARPER ,  Leonard P. GULER ,  Marko RADOSAVLJEVIC ,  Thoe MICHAELOS

IPC: H01L29/423 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/768 ,  H01L21/02

Abstract: Embodiments disclosed herein include semiconductor devices and methods of making such devices. In an embodiment, the semiconductor device comprises a plurality of stacked semiconductor channels comprising first semiconductor channels and second semiconductor channels over the first semiconductor channels. In an embodiment a spacing is between the first semiconductor channels and the second semiconductor channels. The semiconductor device further comprises a gate dielectric surrounding individual ones of the semiconductor channels of the plurality of stacked semiconductor channels. In an embodiment, a first workfunction metal surrounds the first semiconductor channels, and a second workfunction metal surrounds the second semiconductor channels.

公开(公告)号：US20230090106A1

公开(公告)日：2023-03-23

申请号：US17481253

申请日：2021-09-21

Applicant: Intel Corporation

Inventor： Han Wui THEN ,  Marko RADOSAVLJEVIC ,  Sansaptak DASGUPTA ,  Paul B. FISCHER ,  Walid M. HAFEZ ,  Nicole K. THOMAS ,  Nityan NAIR ,  Pratik KOIRALA ,  Paul NORDEEN ,  Tushar TALUKDAR ,  Thomas HOFF ,  Thoe MICHAELOS

IPC: H01L29/04 ,  H01L27/092 ,  H01L29/778 ,  H01L21/8252 ,  H01L27/12 ,  H01L21/84

Abstract: Gallium nitride (GaN) layer transfer for integrated circuit technology is described. In an example, an integrated circuit structure includes a substrate including silicon. A first layer including gallium and nitrogen is over a first region of the substrate, the first layer having a gallium-polar orientation with a top crystal plane consisting of a gallium face. A second layer including gallium and nitrogen is over a second region of the substrate, the second layer having a nitrogen-polar orientation with a top crystal plane consisting of a nitrogen face.

公开(公告)号：US20240332389A1

公开(公告)日：2024-10-03

申请号：US18736428

申请日：2024-06-06

Applicant: Intel Corporation

Inventor： Nicole THOMAS ,  Michael K. HARPER ,  Leonard P. GULER ,  Marko RADOSAVLJEVIC ,  Thoe MICHAELOS

IPC: H01L29/423 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/06

CPC classification number: H01L29/42392 ,  H01L21/0228 ,  H01L21/76897 ,  H01L21/823412 ,  H01L29/0669

Abstract: Embodiments disclosed herein include semiconductor devices and methods of making such devices. In an embodiment, the semiconductor device comprises a plurality of stacked semiconductor channels comprising first semiconductor channels and second semiconductor channels over the first semiconductor channels. In an embodiment a spacing is between the first semiconductor channels and the second semiconductor channels. The semiconductor device further comprises a gate dielectric surrounding individual ones of the semiconductor channels of the plurality of stacked semiconductor channels. In an embodiment, a first workfunction metal surrounds the first semiconductor channels, and a second workfunction metal surrounds the second semiconductor channels.