公开(公告)号：US20240213118A1

公开(公告)日：2024-06-27

申请号：US18088545

申请日：2022-12-24

Applicant: Intel Corporation

Inventor： Han Wui THEN ,  Marko RADOSAVLJEVIC ,  Heli Chetanbhai VORA ,  Samuel James BADER ,  Ahmad ZUBAIR ,  Thomas HOFF ,  Pratik KOIRALA ,  Michael S. BEUMER ,  Paul NORDEEN ,  Nityan NAIR

IPC: H01L23/48 ,  H01L23/528 ,  H01L23/532 ,  H01L23/66 ,  H01L29/20 ,  H01L29/40 ,  H01L29/778 ,  H01P3/00

CPC classification number: H01L23/481 ,  H01L23/5286 ,  H01L23/53228 ,  H01L23/66 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/7786 ,  H01P3/003 ,  H01L2223/6627

Abstract: Gallium nitride (GaN) devices with through-silicon vias for integrated circuit technology are described. In an example, an integrated circuit structure includes a layer including gallium and nitrogen, the layer including gallium and nitrogen above a silicon substrate. A backside structure is below the silicon substrate and opposite the layer including gallium and nitrogen, the backside structure including conductive features and dielectric structures. The integrated circuit structure also includes a plurality of through-silicon via power bars having a staggered arrangement, individual ones of the through-silicon via power bars extending through the layer including gallium and nitrogen and through the silicon substrate to a corresponding one of the conductive features of the backside structure, and individual ones of the through-silicon via power bars having a tapered portion coupled to an essentially vertical portion.

公开(公告)号：US20240213140A1

公开(公告)日：2024-06-27

申请号：US18088541

申请日：2022-12-24

Applicant: Intel Corporation

Inventor： Han Wui THEN ,  Marko RADOSAVLJEVIC ,  Samuel James BADER ,  Ahmad ZUBAIR ,  Pratik KOIRALA ,  Michael S. BEUMER ,  Heli Chetanbhai VORA ,  Ibrahim BAN ,  Nityan NAIR ,  Thomas HOFF

IPC: H01L23/522 ,  H01L23/48

CPC classification number: H01L23/5223 ,  H01L23/481 ,  H01L23/5226

Abstract: Structures having backside high voltage capacitors for front side GaN-based devices are described. In an example, an integrated circuit structure includes a front side structure including a GaN-based device layer, and one or more metallization layers above the GaN-based device layer. A backside structure is below and coupled to the GaN-based layer, the backside structure including metal layers and one or more alternating laterally-recessed metal insulator metal capacitors.

公开(公告)号：US20230081460A1

公开(公告)日：2023-03-16

申请号：US17476310

申请日：2021-09-15

Applicant: Intel Corporation

Inventor： Han Wui THEN ,  Marko RADOSAVLJEVIC ,  Nicole K. THOMAS ,  Pratik KOIRALA ,  Nityan NAIR ,  Paul B. FISCHER

IPC: G02B6/42 ,  G06F1/16

Abstract: Gallium nitride (GaN) integrated circuit technology with optical communication is described. In an example, an integrated circuit structure includes a layer or substrate having a first region and a second region, the layer or substrate including gallium and nitrogen. A GaN-based device is in or on the first region of the layer or substrate. A CMOS-based device is over the second region of the layer or substrate. An interconnect structure is over the GaN-based device and over the CMOS-based device, the interconnect structure including conductive interconnects and vias in a dielectric layer. A photonics waveguide is over the interconnect structure, the photonics waveguide including silicon, and the photonics waveguide bonded to the dielectric layer of the interconnect structure.

公开(公告)号：US20230047449A1

公开(公告)日：2023-02-16

申请号：US17402054

申请日：2021-08-13

Applicant: Intel Corporation

Inventor： Nicole K. THOMAS ,  Samuel James BADER ,  Marko RADOSAVLJEVIC ,  Han Wui THEN ,  Pratik KOIRALA ,  Nityan NAIR

IPC: H01L27/06 ,  H01L29/20 ,  H01L29/40 ,  H01L29/778 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786 ,  H01L21/02

Abstract: Gallium nitride (GaN) integrated circuit technology is described. In an example, an integrated circuit structure includes a substrate including silicon, the substrate having a top surface. A first trench is in the substrate, the first trench having a first width. A second trench is in the substrate, the second trench having a second width less than the first width. A first island is in the first trench, the first island including gallium and nitrogen and having first corner facets below the top surface of the substrate. A second island is in the second trench, the second island including gallium and nitrogen and having second corner facets below the top surface of the substrate.

公开(公告)号：US20230090106A1

公开(公告)日：2023-03-23

申请号：US17481253

申请日：2021-09-21

Applicant: Intel Corporation

Inventor： Han Wui THEN ,  Marko RADOSAVLJEVIC ,  Sansaptak DASGUPTA ,  Paul B. FISCHER ,  Walid M. HAFEZ ,  Nicole K. THOMAS ,  Nityan NAIR ,  Pratik KOIRALA ,  Paul NORDEEN ,  Tushar TALUKDAR ,  Thomas HOFF ,  Thoe MICHAELOS

IPC: H01L29/04 ,  H01L27/092 ,  H01L29/778 ,  H01L21/8252 ,  H01L27/12 ,  H01L21/84

Abstract: Gallium nitride (GaN) layer transfer for integrated circuit technology is described. In an example, an integrated circuit structure includes a substrate including silicon. A first layer including gallium and nitrogen is over a first region of the substrate, the first layer having a gallium-polar orientation with a top crystal plane consisting of a gallium face. A second layer including gallium and nitrogen is over a second region of the substrate, the second layer having a nitrogen-polar orientation with a top crystal plane consisting of a nitrogen face.

公开(公告)号：US20230069054A1

公开(公告)日：2023-03-02

申请号：US17410257

申请日：2021-08-24

Applicant: Intel Corporation

Inventor： Souvik GHOSH ,  Han Wui THEN ,  Pratik KOIRALA ,  Tushar TALUKDAR ,  Paul NORDEEN ,  Nityan NAIR ,  Marko RADOSAVLJEVIC ,  Ibrahim BAN ,  Kimin JUN ,  Jay GUPTA ,  Paul B. FISCHER ,  Nicole K. THOMAS ,  Thomas HOFF ,  Samuel James BADER

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/66

Abstract: Gallium nitride (GaN) integrated circuit technology with multi-layer epitaxy and layer transfer is described. In an example, an integrated circuit structure includes a first channel structure including a plurality of alternating first channel layers and second channel layers, the first channel layers including gallium and nitrogen, and the second layers including gallium, aluminum and nitrogen. A second channel structure is bonded to the first channel structure. The second channel structure includes a plurality of alternating third channel layers and fourth channel layers, the third channel layers including gallium and nitrogen, and the fourth layers including gallium, aluminum and nitrogen.