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公开(公告)号:US20240193451A1
公开(公告)日:2024-06-13
申请号:US18078781
申请日:2022-12-09
Applicant: Intel Corporation
Inventor: Anne MATSUURA , Pradnya Laxman KHALATE , Shavindra PREMARATNE , Sahar DARAEIZADEH , Albert SCHMITZ , Xin-Chuan WU , Todor MLADENOV , Brandon BARNETT
IPC: G06N10/20
CPC classification number: G06N10/20
Abstract: Apparatus and method for compiling and executing hybrid classical-quantum programs. For example, one embodiment of an apparatus comprises: a host processor to perform a partial compilation on hybrid quantum-classical source code to generate one or more sequential blocks of quantum operations; a quantum compiler accelerator to receive compilation work offloaded by the host processor including the one or more sequential blocks of quantum operations, the quantum compiler to perform optimization operations to optimize runtime execution of one or more of the quantum operations in view if a quantum accelerator architecture to generate optimized quantum operations; and a quantum execution accelerator having the quantum accelerator architecture to execute the optimized quantum operations to manipulate a state of one or more qubits, to measure a state of the one or more qubits, and to provide measurement data indicating the state to the host processor.
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公开(公告)号:US20240022248A1
公开(公告)日:2024-01-18
申请号:US18028513
申请日:2020-09-25
Applicant: Intel Corporation
Inventor: Stefano PELLERANO , Christopher HULL , Todor MLADENOV , JongSeok PARK , Ilya KLOCHKOV , Sushil SUBRAMANIAN
Abstract: Apparatus and methods for interfacing an integrated qubit control chip and a solid state qubit; detecting a qubit state with a transition pulse histogram; high resolution and high speed rectangular pulse generation; large-scale spin qubit state readout; and activity-based clock control.
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