公开(公告)号：US20240178227A1

公开(公告)日：2024-05-30

申请号：US18072564

申请日：2022-11-30

Applicant: Intel Corporation

Inventor： Venkata Aditya ADDEPALLI ,  Shyam Benegal KADALI

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L27/092 ,  H01L21/823807 ,  H01L21/82385 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775

Abstract: Integrated circuit structures having uniformity among varying gate trench widths are described. For example, an integrated circuit structure includes a first fin, and a first gate trench over the first fin, the first gate trench having a first width. The integrated circuit structure also includes a second fin, and a second gate trench over the second fin, the second gate trench having a second width greater than the first width. The integrated circuit structure also includes a gate electrode layer having a first portion along a bottom and partially along sidewalls of the first trench, and the gate electrode layer having a second portion along a bottom and partially along sidewalls of the second trench, wherein the first portion extends along the sidewalls of the first trench to approximately the same extent as the second portion extends along the sidewalls of the second trench.