公开(公告)号：US20230401109A1

公开(公告)日：2023-12-14

申请号：US18237860

申请日：2023-08-24

Applicant: Intel Corporation

Inventor： Niall D. MCDONNELL ,  Ambalavanar ARULAMBALAM ,  Te Khac MA ,  Surekha PERI ,  Pravin PATHAK ,  James CLEE ,  An YAN ,  Steven POLLOCK ,  Bruce RICHARDSON ,  Vijaya Bhaskar KOMMINENI ,  Abhinandan GUJJAR

IPC: G06F9/50

CPC classification number: G06F9/5083 ,  G06F9/5038

Abstract: Examples described herein relate to a load balancer that is configured to selectively perform ordering of requests from the one or more cores, allocate the requests into queue elements prior to allocation to one or more receiver cores of the one or more cores to process the requests, and perform two or more operations of: adjust a number of queues associated with a core of the one or more cores by changing a number of consumer queues (CQs) allocated to a single domain, adjust a number of target cores in a group of target cores to be load balanced, and order memory space writes from multiple caching agents (CAs).