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公开(公告)号:US20200312736A1
公开(公告)日:2020-10-01
申请号:US16368049
申请日:2019-03-28
Applicant: Intel Corporation
Inventor: Bijendra SINGH , Vikas RAO , Sandesh Geejagaaru KRISHNAMURTHY , Navneet Kumar SINGH , Unnikrishnan Gopinanthan PILLAI
IPC: H01L23/367 , H01L23/498 , H01L23/48
Abstract: Embodiments disclosed herein include electronic packages with improved thermal performance. In an embodiment, the electronic package comprises a first package substrate, a first die stack over the first package substrate, and a heat spreader over the first die stack. In an embodiment, the heat spreader comprises arms that extend out past sidewalls of the first package substrate. In an embodiment, the electronic package further comprises an interposer over and around the heat spreader, where the interposer is electrically coupled to the first package substrate by a plurality of interconnects. In an embodiment, the electronic package further comprises a second package substrate over the interposer, and a second die over the second package substrate.
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公开(公告)号:US20200033401A1
公开(公告)日:2020-01-30
申请号:US16045242
申请日:2018-07-25
Applicant: Intel Corporation
Inventor: Ramaswamy PARTHASARATHY , Vikas RAO , Praveen PAI
Abstract: Embodiments include a method of stress testing an electronics package with components that include a visual indicator. In an embodiment, the method comprises populating a plurality of components on an electronics package. In an embodiment, the plurality of components each comprise a visual indicator that is responsive to heat. In an embodiment, the method further comprises stress testing the electronics package and categorizing the plurality of components based on the visual indicators. In an embodiment, the method may further comprise modifying the plurality of components.
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