公开(公告)号：US20240006358A1

公开(公告)日：2024-01-04

申请号：US17854813

申请日：2022-06-30

Applicant: Intel Corporation

Inventor： Zhihua Zou ,  Omkar Karhade ,  Botao Zhang ,  Julia Chiu ,  Vivek Chidambaram ,  Yi Shi ,  Mohit Bhatia ,  Mostafa Aghazadeh

IPC: H01L23/00

CPC classification number: H01L24/08 ,  H01L24/80 ,  H01L2224/08059 ,  H01L2224/08145 ,  H01L2224/80031 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: Bonding pedestals on substrates, and their manufacture, for direct bonding integrated circuit (IC) dies onto substrates. The electrical interconnections of one or more IC dies and a substrate are bonded together with the IC dies on and overhanging the pedestals. A bonding pedestal may be formed by etching down the substrate around the interconnections. A system may include one or more such pedestals above and adjacent a recessed surface on a substrate with IC dies overhanging the pedestals. Such a system may be coupled to a host component, such as a board, and a power supply via the host component.

公开(公告)号：US20240332237A1

公开(公告)日：2024-10-03

申请号：US18194702

申请日：2023-04-03

Applicant: Intel Corporation

Inventor： Vivek Chidambaram ,  Jonathan Burk ,  Zhihua Zou

IPC: H01L23/00 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L24/16 ,  H01L23/5383 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/13147 ,  H01L2224/14505 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17055 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/182

Abstract: Disclosed herein are microelectronic assemblies with direct bonding using nanotwinned copper (NTC). An example microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding (DB) region, wherein the DB region includes a DB contact comprising a first portion and a second portion having different microstructures. The first portion is between the first microelectronic component and the second portion. The second portion is between the first portion and the second microelectronic component. In some implementations, the first portion has non-columnar microstructure, and the second portion has columnar microstructure. In some implementations, less than about 40% of grains of the first portion have ac orientation, and at least about 50% of grains of the second portion have the orientation. In some embodiments, the first portion includes PCC or FGC, and the second portion includes NTC.