公开(公告)号：US20230238347A1

公开(公告)日：2023-07-27

申请号：US18128077

申请日：2023-03-29

申请人： Intel IP Corporation

发明人： Gianni SIGNORINI ,  Veronica SCIRIHA ,  Thomas WAGNER

IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/31 ,  H01L23/538

CPC分类号： H01L24/20 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2924/15311 ,  H01L2924/19104

摘要： In accordance with disclosed embodiments, there is a method of integrating and accessing passive components in three-dimensional fan-out wafer-level packages. One example is a microelectronic die package that includes a die, a package substrate attached to the die on one side of the die and configured to be connected to a system board, a plurality of passive devices over a second side of the die, and a plurality of passive device contacts over a respective passive die, the contacts being configured to be coupled to a second die mounted over the passive devices and over the second side of the die.

公开(公告)号：US20210057367A1

公开(公告)日：2021-02-25

申请号：US16635146

申请日：2017-09-29

申请人： Intel IP Corporation

发明人： Gianni SIGNORINI ,  Veronica SCIRIHA ,  Thomas WAGNER

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683

摘要： In accordance with disclosed embodiments, there is a method of integrating and accessing passive components in three-dimensional fan-out wafer-level packages. One example is a microelectronic die package that includes a die, a package substrate attached to the die on one side of the die and configured to be connected to a system board, a plurality of passive devices over a second side of the die, and a plurality of passive device contacts over a respective passive die, the contacts being configured to be coupled to a second die mounted over the passive devices and over the second side of the die.