公开(公告)号：US10126968B2

公开(公告)日：2018-11-13

申请号：US14863590

申请日：2015-09-24

申请人： International Business Machines Corporation

发明人： John S. Bialas, Jr. ,  Stephen P. Glancy ,  Saravanan Sethuraman ,  Jacob D. Sloat

IPC分类号： G06F3/06 ,  G06F12/0802

摘要： In an example, a system includes a memory controller that includes a plurality of memory components. The system also includes a memory controller configured to receive a plurality of memory settings to be applied to the plurality of memory components. The memory controller is configured to, based on the received memory settings, transmit a first command to the plurality of memory components, the first command causing each memory component of the plurality of memory components to be configured to a first memory setting. The memory controller is configured to, based on the received memory settings, transmit a second command to a subset of the plurality of memory components after transmitting the first command, the second command causing each memory component of the subset to be configured to a second memory setting.

公开(公告)号：US09753806B1

公开(公告)日：2017-09-05

申请号：US15293645

申请日：2016-10-14

申请人： International Business Machines Corporation

发明人： Stephen P. Glancy ,  Jeremy R. Neaton ,  Anuwat Saetow ,  Jacob D. Sloat

IPC分类号： G11C16/04 ,  G06F11/14 ,  G11C29/52

CPC分类号： G06F11/142 ,  G06F2201/805 ,  G11C11/401 ,  G11C29/028 ,  G11C29/4401 ,  G11C29/52 ,  G11C29/832 ,  G11C2029/0409

摘要： A method, system and memory controller are provided for implementing signal integrity fail recovery and mainline calibration for Dynamic Random Access Memory (DRAM). After identifying a failed DRAM, the DRAM is marked as bad and taken out of mainline operation. Characterization tests and periodic calibrations are run to evaluate optimal settings and to determine if the marked DRAM is recoverable. If recoverable, the marked DRAM chip is redeployed. If unrecoverable, error reporting is provided to the user.

公开(公告)号：US20170090804A1

公开(公告)日：2017-03-30

申请号：US14863590

申请日：2015-09-24

申请人： International Business Machines Corporation

发明人： John S. Bialas, JR. ,  Stephen P. Glancy ,  Saravanan Sethuraman ,  Jacob D. Sloat

IPC分类号： G06F3/06 ,  G06F12/08

CPC分类号： G06F3/0629 ,  G06F3/0604 ,  G06F3/0683 ,  G06F12/0802 ,  G06F13/1694 ,  G06F2212/20 ,  G11C7/00

摘要： In an example, a system includes a memory controller that includes a plurality of memory components. The system also includes a memory controller configured to receive a plurality of memory settings to be applied to the plurality of memory components. The memory controller is configured to, based on the received memory settings, transmit a first command to the plurality of memory components, the first command causing each memory component of the plurality of memory components to be configured to a first memory setting. The memory controller is configured to, based on the received memory settings, transmit a second command to a subset of the plurality of memory components after transmitting the first command, the second command causing each memory component of the subset to be configured to a second memory setting.