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1.
公开(公告)号:US20230318286A1
公开(公告)日:2023-10-05
申请号:US17657989
申请日:2022-04-05
Applicant: International Business Machines Corporation
Inventor: Adam Benjamin COLLURA , Michael ROMAIN , William V. HUOTT , Pawel OWCZARCZYK , Christian JACOBI , Anthony SAPORITO , Chung-Lung K. SHUM , Alper BUYUKTOSUNOGLU , Tobias WEBEL , Michael Joseph CADIGAN, JR. , Paul Jacob LOGSDON , Sean Michael CAREY , Stefan PAYER , Karl Evan Smock ANDERSON , Mark CICHANOWSKI
Abstract: The method and systems described herein provide for identifying and mitigating undesirable power or voltage fluctuations in regions of a semiconductor device. For example, embodiments include detecting a region, such as an individual processor, of a processor chip is exhibiting a reduced power draw and a resulting localized voltage spike (e.g., a spike that exceeds Vmax) that would accelerate overall device end-of-life (EOL). The described systems respond by activating circuits or current generators located in the given region to draw additional power via a protective current. The protective current lowers the local voltages spikes back to within some pre-specified range (e.g., below a Vmax). The resulting reduction in the time above Vmax in testing reduces the number of devices that will need to be discarded due to Vmax violations as well as increases the expected reliability and lifespan of the device in operation.
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公开(公告)号:US20220148927A1
公开(公告)日:2022-05-12
申请号:US17095931
申请日:2020-11-12
Applicant: International Business Machines Corporation
Inventor: David Wolpert , DANIEL JAMES DECHENE , Lawrence A. Clevenger , Michael ROMAIN , SOMNATH GHOSH
Abstract: A method can include obtaining characteristic data for a wafer. The characteristic data can correspond to the wafer in a processed state and can include a set of stress values of the wafer. The wafer can include a front side, a back side opposite the front side, and a set of regions. The set of stress values can include a first stress value corresponding to a first region. In the processed state, one or more front-side processes can be completed on the front side of the wafer. The method can include determining that the first stress value exceeds a stress threshold and generating a compensation map. The compensation map can identify one or more regions for forming one or more trenches. The method can include initiating, based on the compensation map, a formation of a first trench on the back side of the wafer in the first region.
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