公开(公告)号：US10223089B1

公开(公告)日：2019-03-05

申请号：US15795861

申请日：2017-10-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Steven J. Perron

IPC: G06F9/45 ,  G06F9/44 ,  G06F9/30 ,  G06F8/41

Abstract: A method for partial redundancy elimination with a fixed number of temporaries includes determining local data values of program code that describe a temporary memory location, a set of registers, and a set of basic blocks. The method determines global data values of the program code based on the determined local data values of the program code. The method removes a first load of the temporary memory location in a first basic block in the program code. The method adds a second load on a first edge from a second basic block out of the set of basic blocks to a third basic block out of the set of basic blocks in the program code. The method performs a register move on a second edge from the third basic block to the second basic block in the program code.

公开(公告)号：US20170060552A1

公开(公告)日：2017-03-02

申请号：US14838457

申请日：2015-08-28

Applicant: International Business Machines Corporation

Inventor： Steven J. Perron

IPC: G06F9/45

CPC classification number: G06F8/443 ,  G06F8/441 ,  G06F8/4435 ,  G06F9/30098 ,  G06F9/384

Abstract: A method, executed by a computer, for splitting live register ranges includes identifying one or more H pathways comprising one or more H nodes having high register pressure, identifying an L pathway consisting of two or more L nodes, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway, wherein the register splitting instructions are inserted at a starting node of the one or more H pathways. A computer program product and computer system corresponding to the above method are also disclosed herein.

Abstract translation: 由计算机执行的用于分离实况寄存器范围的方法包括识别包括具有高寄存器压力的一个或多个H节点的一个或多个H路径，识别由两个或更多个L个节点组成的L路径，以及为每个H路径插入寄存器拆分指令 存在于一个或多个H途径和L途径中的符号寄存器，其中寄存器分离指令被插入到一个或多个H路径的起始节点处。 本文还公开了与上述方法对应的计算机程序产品和计算机系统。

公开(公告)号：US09582255B1

公开(公告)日：2017-02-28

申请号：US14838457

申请日：2015-08-28

Applicant: International Business Machines Corporation

Inventor： Steven J. Perron

IPC: G06F9/44 ,  G06F9/45

CPC classification number: G06F8/443 ,  G06F8/441 ,  G06F8/4435 ,  G06F9/30098 ,  G06F9/384

Abstract: A method, executed by a computer, for splitting live register ranges includes identifying one or more H pathways comprising one or more H nodes having high register pressure, identifying an L pathway consisting of two or more L nodes, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway, wherein the register splitting instructions are inserted at a starting node of the one or more H pathways. A computer program product and computer system corresponding to the above method are also disclosed herein.

Abstract translation: 由计算机执行的用于分离实况寄存器范围的方法包括识别包括具有高寄存器压力的一个或多个H节点的一个或多个H路径，识别由两个或更多个L个节点组成的L路径，以及为每个H路径插入寄存器拆分指令 存在于一个或多个H途径和L途径中的符号寄存器，其中寄存器分离指令被插入到一个或多个H路径的起始节点处。 本文还公开了与上述方法对应的计算机程序产品和计算机系统。

公开(公告)号：US10133561B1

公开(公告)日：2018-11-20

申请号：US15690767

申请日：2017-08-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Steven J. Perron

IPC: G06F9/45 ,  G06F9/30 ,  G06F9/44 ,  G06F8/41

Abstract: A method for partial redundancy elimination with a fixed number of temporaries includes determining local data values of program code that describe a temporary memory location, a set of registers, and a set of basic blocks. The method determines global data values of the program code based on the determined local data values of the program code. The method removes a first load of the temporary memory location in a first basic block in the program code. The method adds a second load on a first edge from a second basic block out of the set of basic blocks to a third basic block out of the set of basic blocks in the program code. The method performs a register move on a second edge from the third basic block to the second basic block in the program code.

公开(公告)号：US20190065163A1

公开(公告)日：2019-02-28

申请号：US15795861

申请日：2017-10-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Steven J. Perron

IPC: G06F9/45

Abstract: A method for partial redundancy elimination with a fixed number of temporaries includes determining local data values of program code that describe a temporary memory location, a set of registers, and a set of basic blocks. The method determines global data values of the program code based on the determined local data values of the program code. The method removes a first load of the temporary memory location in a first basic block in the program code. The method adds a second load on a first edge from a second basic block out of the set of basic blocks to a third basic block out of the set of basic blocks in the program code. The method performs a register move on a second edge from the third basic block to the second basic block in the program code.

公开(公告)号：US09916142B2

公开(公告)日：2018-03-13

申请号：US14883824

申请日：2015-10-15

Applicant: International Business Machines Corporation

Inventor： Jaques Clapauch ,  Steven J. Perron

IPC: G06F9/45

CPC classification number: G06F8/443 ,  G06F8/433 ,  G06F8/4441

Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.

公开(公告)号：US20170109147A1

公开(公告)日：2017-04-20

申请号：US14883824

申请日：2015-10-15

Applicant: International Business Machines Corporation

Inventor： Jaques Clapauch ,  Steven J. Perron

IPC: G06F9/45

CPC classification number: G06F8/443 ,  G06F8/433 ,  G06F8/4441

Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.

公开(公告)号：US09411565B1

公开(公告)日：2016-08-09

申请号：US14970572

申请日：2015-12-16

Applicant: International Business Machines Corporation

Inventor： Steven J. Perron

IPC: G06F9/45

CPC classification number: G06F8/443 ,  G06F8/441 ,  G06F8/4435 ,  G06F9/30098 ,  G06F9/384

Abstract: A method, executed by a computer, for splitting live register ranges includes identifying one or more H pathways comprising one or more H nodes having high register pressure using a backwards data flow in the graph, identifying an L pathway consisting of two or more L nodes using a depth first search, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway. The register splitting instructions are inserted at a starting node of the one or more H pathways. Register merging instructions are inserted at an ending node of the one or more H pathways.

Abstract translation: 由计算机执行的用于分离实时寄存器范围的方法包括使用图中的向后数据流识别包括具有高寄存器压力的一个或多个H节点的一个或多个H路径，识别由两个或更多个L节点组成的L路径 使用深度优先搜索，以及为存在于一个或多个H路径和L路径中的每个符号寄存器插入寄存器分离指令。 寄存器拆分指令被插入到一个或多个H路径的起始节点处。 注册合并指令插入到一个或多个H路径的结束节点。

公开(公告)号：US10289392B2

公开(公告)日：2019-05-14

申请号：US15835878

申请日：2017-12-08

Applicant: International Business Machines Corporation

Inventor： Jaques Clapauch ,  Steven J. Perron

IPC: G06F8/41

Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.

公开(公告)号：US20170109149A1

公开(公告)日：2017-04-20

申请号：US15140665

申请日：2016-04-28

Applicant: International Business Machines Corporation

Inventor： Jaques Clapauch ,  Steven J. Perron

IPC: G06F9/45

CPC classification number: G06F8/443 ,  G06F8/433 ,  G06F8/4441

Abstract: Embodiments disclose a method, computer program product, and system for optimizing computer functions. The embodiment may create a control flow graph from a computer function. The control flow graph may contain an entry block, an exit block, and basic blocks located between the entry block and the exit block. The embodiment may classify each of the basic blocks as an original heavy basic block or an original light basic block. The embodiment may classify the original heavy block, the exit block and each of the basic blocks that are located between each original heavy block and the exit block as a determined heavy block. The embodiment may create light computer functions and heavy computer functions from the computer function. Each heavy computer function contains the basic blocks classified as determined heavy. The light computer functions contains the remaining basic blocks, the exit block and calls to the heavy computer functions.