Adjustable delay line devices and methods thereof

    公开(公告)号:US11658647B2

    公开(公告)日:2023-05-23

    申请号:US17405009

    申请日:2021-08-17

    申请人: Intrinsix Corp.

    IPC分类号: H03K5/00 H03K5/133 H03K5/145

    摘要: A switched delay section for an integrated circuit device is disclosed. The switched delay section includes a segmented inductor loop comprising a plurality of segments separated by nodes. A plurality of capacitors are coupled between the segmented inductor loop to provide a plurality of delay sections. An image loop is in electrical communication with the segmented inductor loop. The image loop includes a switch configured to place the plurality of capacitors in one of a high capacitance or a low capacitance state to provide a variable delay value.

    ADJUSTABLE DELAY LINE DEVICES AND METHODS THEREOF

    公开(公告)号:US20220131535A1

    公开(公告)日:2022-04-28

    申请号:US17405009

    申请日:2021-08-17

    申请人: Intrinsix Corp.

    IPC分类号: H03K5/133

    摘要: A switched delay section for an integrated circuit device is disclosed. The switched delay section includes a segmented inductor loop comprising a plurality of segments separated by nodes. A plurality of capacitors are coupled between the segmented inductor loop to provide a plurality of delay sections. An image loop is in electrical communication with the segmented inductor loop. The image loop includes a switch configured to place the plurality of capacitors in one of a high capacitance or a low capacitance state to provide a variable delay value.

    Radio frequency tripler systems and methods thereof

    公开(公告)号:US11601090B1

    公开(公告)日:2023-03-07

    申请号:US17463057

    申请日:2021-08-31

    申请人: Intrinsix Corp.

    摘要: This frequency tripler system uses a cascade of integrated transistor circuit differential limiting amplifiers and tunable notch filters that can directly serve one or more outputs, such as a direct clock or local oscillator drive. With this topology, filtering is distributed between two or more stages of differential limiting amplifiers and tunable notch filters. This enables suppression of smaller fundamental tone by the differential limiting amplifiers along with the tunable notch filters and yields a strong third harmonic signal to directly drive high performance mixers and digital-to-analog converters.

    RADIO FREQUENCY TRIPLER SYSTEMS AND METHODS THEREOF

    公开(公告)号:US20230067543A1

    公开(公告)日:2023-03-02

    申请号:US17463057

    申请日:2021-08-31

    申请人: Intrinsix Corp.

    摘要: This frequency tripler system uses a cascade of integrated transistor circuit differential limiting amplifiers and tunable notch filters that can directly serve one or more outputs, such as a direct clock or local oscillator drive. With this topology, filtering is distributed between two or more stages of differential limiting amplifiers and tunable notch filters. This enables suppression of smaller fundamental tone by the differential limiting amplifiers along with the tunable notch filters and yields a strong third harmonic signal to directly drive high performance mixers and digital-to-analog converters.