Apparatus, system, and method of providing a ramped interconnect for semiconductor fabrication

    公开(公告)号:US11862492B2

    公开(公告)日:2024-01-02

    申请号:US17391120

    申请日:2021-08-02

    申请人: JABIL INC.

    IPC分类号: H01L21/67 C23C18/08 H01L21/48

    摘要: The disclosure is and includes at least an apparatus, system and method for a ramped electrical interconnection for use in semiconductor fabrications. The apparatus, system and method includes at least a first semiconductor substrate having thereon a first electrical circuit comprising first electrical components; a second semiconductor substrate at least partially covering the first electrical circuit, and having thereon a second electrical circuit comprising second electrical components; a ramp formed through the second semiconductor substrate between at least one of the first electrical components and at least one of the second electrical components; and an additively manufactured conductive trace formed on the ramp to electrically connect the at least one first electrical component and the at least one second electrical component.

    APPARATUS, SYSTEM, AND METHOD OF PROVIDING A RAMPED INTERCONNECT FOR SEMICONDUCTOR FABRICATION

    公开(公告)号:US20220093424A1

    公开(公告)日:2022-03-24

    申请号:US17391120

    申请日:2021-08-02

    申请人: JABIL INC.

    IPC分类号: H01L21/67 C23C18/08 H01L21/48

    摘要: The disclosure is and includes at least an apparatus, system and method for a ramped electrical interconnection for use in semiconductor fabrications. The apparatus, system and method includes at least a first semiconductor substrate having thereon a first electrical circuit comprising first electrical components; a second semiconductor substrate at least partially covering the first electrical circuit, and having thereon a second electrical circuit comprising second electrical components; a ramp formed through the second semiconductor substrate between at least one of the first electrical components and at least one of the second electrical components; and an additively manufactured conductive trace formed on the ramp to electrically connect the at least one first electrical component and the at least one second electrical component.

    APPARATUS, SYSTEM, AND METHOD OF PROVIDING A RAMPED INTERCONNECT FOR SEMICONDUCTOR FABRICATION

    公开(公告)号:US20240178016A1

    公开(公告)日:2024-05-30

    申请号:US18529193

    申请日:2023-12-05

    申请人: JABIL INC.

    IPC分类号: H01L21/67 C23C18/08 H01L21/48

    摘要: The disclosure is and includes at least an apparatus, system and method for a ramped electrical interconnection for use in semiconductor fabrications. The apparatus, system and method includes at least a first semiconductor substrate having thereon a first electrical circuit comprising first electrical components; a second semiconductor substrate at least partially covering the first electrical circuit, and having thereon a second electrical circuit comprising second electrical components; a ramp formed through the second semiconductor substrate between at least one of the first electrical components and at least one of the second electrical components; and an additively manufactured conductive trace formed on the ramp to electrically connect the at least one first electrical component and the at least one second electrical component.

    Apparatus, system, and method of providing a ramped interconnect for semiconductor fabrication

    公开(公告)号:US11081375B2

    公开(公告)日:2021-08-03

    申请号:US17003595

    申请日:2020-08-26

    申请人: JABIL INC.

    IPC分类号: H01L21/67 C23C18/08 H01L21/48

    摘要: The disclosure is and includes at least an apparatus, system and method for a ramped electrical interconnection for use in semiconductor fabrications. The apparatus, system and method includes at least a first semiconductor substrate having thereon a first electrical circuit comprising first electrical components; a second semiconductor substrate at least partially covering the first electrical circuit, and having thereon a second electrical circuit comprising second electrical components; a ramp formed through the second semiconductor substrate between at least one of the first electrical components and at least one of the second electrical components; and an additively manufactured conductive trace formed on the ramp to electrically connect the at least one first electrical component and the at least one second electrical component.

    Adhesive Circuit Patterning Process
    7.
    发明申请

    公开(公告)号:US20200267844A1

    公开(公告)日:2020-08-20

    申请号:US16278472

    申请日:2019-02-18

    申请人: Jabil Inc.

    IPC分类号: H05K3/30 H05K3/32 H05K1/02

    摘要: Disclosed are processes and materials for adhesive circuit patterning which strengthen and protect printed circuit traces and adhesive bonded joints of surface mounted devices in flexible or stretchable electronics in a single process. A method for adhesive circuit pattering include deposing a circuit pattern on a thermal adhesive film. One or more surface mounted device(s) are attached to a cured printed circuit to form an assembled printed circuit. The assembled printed circuit may be placed on a stretchable substrate. The thermal adhesive film is melted on the assembled printed circuit and the stretchable substrate to protect and reinforce joint bonds and the circuit pattern of the assembled circuit pattern and attach the assembled printed circuit to the stretchable fabric in one melting or curing step.