摘要:
A system for detecting and compensating for a saturation condition of a power amplifier where an error signal is produced by differencing a signal representative of or derived from a control signal for controlling the shape of the output of the power amplifier and a signal representative of or derived from the output of the power amplifier. An integrator integrates the error signal to produce a cumulative error signal. A detection circuit detects a saturation condition when the value of the cumulative error equals or exceeds a predetermined value determined during device calibration. Upon the detection of a saturation condition, a compensation circuit derives a compensation value by multiplying the value of the error signal at the time saturation is detected by a predetermined constant, and subtracts this value from the control signal. The input to the power amplifier is derived from the adjusted control signal.
摘要:
The present invention discloses an improved system and method for increasing the timing accuracy of a time domain multiple access (TDMA) mobile communication system using a resource efficient parabolic interpolator. With the present invention, a mobile unit receives burst transmissions from a base station and a timing information is recovered therefrom. Since the timing information establishes the time of arrival of the burst, correlation initially identifies a coarse approximation of the location of the control signal within a defined portion of the burst signal and, together with two adjacent samples. Using a curve fitting technique, a precise position of the peak, relative to the coarse position, is determined. The equation can be solved ahead of time and values from the three samples substituted into a single expression for evaluation. Once the coefficients of the equation are known, the time offset of a refined peak relative to the coarse peak is readily calculated. The refined peak is then used in synchronizing transmission between a mobile unit and the base station.
摘要:
A system for synchronizing a portable transceiver to a network is disclosed. Embodiments of the system for synchronizing a portable transceiver to a network include a crystal oscillator, a frequency synthesizer adapted to receive an output of the crystal oscillator, logic coupled to the crystal oscillator, the logic configured to estimate a frequency error of a received signal; and a first control signal supplied from the logic to the frequency synthesizer, the first control signal configured to adjust the frequency synthesizer to compensate for the error.
摘要:
A multiple-hypothesis frequency detection or demodulation system and method in a mobile communication system such as a GSM mobile telephone system includes a GSM mobile unit for demodulating the received signal by applying three hypotheses. The first hypothesis is based on the assumption that transmitted signal was received without frequency offset or phase rotation. The second hypothesis assumes a phase rotation of +a degrees on the first half of a burst and a phase rotation of −a degrees on the following half burst. Finally, the third hypothesis assumes that the data burst has a phase rotation of −a degrees on the first half burst and a phase rotation of +a degrees on the next following half burst. Any frequency offset is estimated based on a comparison of the results of the three separate demodulation attempts. Based on the frequency offset estimate, the transmitted signal may be demodulated without adjustment of the local oscillator.
摘要:
A system for a closed power control feedback loop allows for the use of a non-linear amplifier for amplifying a phase modulated (PM) signal while introducing an inverse version of the desired amplitude modulated (AM) signal into the feedback loop using a variable gain element. By introducing an inverse version of the desired AM portion of the signal into the power control feedback loop, the non-linear, and highly efficient, power amplifier may be used to amplify only the PM portion of the signal, while the AM portion is introduced by the power control feedback loop. In another aspect of the invention, an inverse version of the AM portion of the desired transmit signal is introduced into the power control feedback loop of an amplifier that is amplifying both a phase modulated signal and an amplitude modulated signal. By introducing an inverse version of the desired AM signal into the power control feedback loop, the power control feedback loop may not cancel the AM component present at the output of the power amplifier. In yet another aspect of the invention, the desired AM signal is injected into the feedback loop along with the power control reference signal.
摘要:
The invention discloses a system for improving performance of the RF amplification stage of communication receivers by accounting for the signal environment of the RF amplifier. The linearity, gain and power supply voltage of the RF amplification stage of the communication receiver is adjusted to produce an optimal signal into the succeeding narrow-band amplification stage(s). The adjustment of the RF stage includes mechanisms such as adjusting the RF amplifier power supply level using a DC to DC converter. It also includes allowing distortion in the RF amplification stage if the distortion in the RF amplification stage does not affect the target signal. For example, if there were a strong signal that fell within the same band as the target signal, amplification would be allowed to be so high that it distorted the undesired signals, but not the tined signals. If the desired signal is the predominant signal, within the RF amplifier's band, then the amplifier gain may be increased only to the point where distortion is detected.
摘要:
The STREAMER FOR RISC DIGITAL SIGNAL PROCESSOR shown herein allows a CPU 46 to interface with a memory 60 via data registers 50. Pre-fetch and post-store of the correct address is determined by an address generator 58 according to a rule determined by a context register 52. An index indicative of this address is stored in an index register 54. The data, context, and index registers together form a streamer 56, streaming data between the CPU 46 and data memory 60. The rule of the context register 52 also drives a converter 62 for converting data between memory format and register format. The speed and flexibility of a RISC device is combined with the intensive memory access of a digital signal processor.
摘要:
A low frequency timing circuit is used to reestablish a timing signal in a high-frequency timing circuit after the high frequency timing circuit has lost and regained power. The timing of the low frequency circuit is measured against the timing of the high frequency circuit before the high frequency circuit has lost power. The low frequency circuit then is used to measure time after the high frequency circuit has lost power. Once the high frequency circuit has regained power, its timing signal is reestablished at an appropriate time based on a time measurement obtained from the low frequency circuit.
摘要:
Communications systems, and particularly portable personal communications systems, such as portable phones, are becoming increasingly digital. One area that has remained largely analog, however, is the modulation and RF amplifier circuits. To produce a RF frequency waveform. An output of a class D amplifier is coupled to an integrator to create an analog signal. A resonant circuit shapes an output waveform based on the analog signal to create a sinusoidal RF broadcast signal. The waveform of the class D amplifier may be duty cycle modulated. Digital modulation may occur using a digital sigma delta modulator or a digital programmable divide modulator. Using the digital modulation techniques and class D amplification techniques together allows for broadcast a PSK signal that has been decomposed into amplitude and phase components.
摘要:
Modern digital integrated circuits are commonly synchronized in their workings by clock circuits. The clock frequency for a circuit must take into account the propagation delay of signals within the critical path of the circuit. If the clock time is not adequate to allow propagation of signals through the critical path, improper circuit operation may result. The propagation delay is not a constant from circuit to circuit, and even in a single circuit may change due to temperature, power supply voltage and the like. Commonly, this variation is handled by assuming a worse case propagation delay of the critical path, and then designing the clock frequency and minimum power supply voltage of the circuit so that the circuit will function under worst case conditions. However, instead of assuming a worse case propagation delay of the critical path, the propagation delay may be measured in an actual circuit path that has been constructed to be the equivalent to, or slightly worse than, the propagation delay of the critical path. By knowing the actual worst case propagation delay, the circuit may be modified to operate with lower power supply voltages, conserving power and/or to controlling the frequency of the clock, so that the clock may be operated at or near the circuit's actual, not theoretical worst case limit. Such modifications of power supply voltage and/or clock frequency may occur during circuit operation and thus, adapt the circuit to the different operating parameters of each circuit.