Method for providing low-level hardware access to in-band and out-of-band firmware
    1.
    发明申请
    Method for providing low-level hardware access to in-band and out-of-band firmware 失效
    用于提供对带内和带外固件的低级硬件访问的方法

    公开(公告)号:US20060179184A1

    公开(公告)日:2006-08-10

    申请号:US11055675

    申请日:2005-02-10

    IPC分类号: G06F3/06 G06F3/02 G06F3/00

    CPC分类号: G06F15/161

    摘要: In-band firmware executes instructions which cause commands to be sent on a coherency fabric. Fabric snoop logic monitors the coherency fabric for command packets that target a resource in one of the support chips attached via an FSI link. Conversion logic converts the information from the fabric packet into an FSI protocol. An FSI command is transmitted via the FSI transmit link to an FSI slave of the intended support chip. An FSI receive link receives response data from the FSI slave of the intended support chip. Conversion logic converts the information from the support chip received via the FSI receive link into the fabric protocol. Response packet generation logic generates the fabric response packet and returns it on the coherency fabric. An identical FSI link between a support processor and support chips allows direct access to the same resources on the support chips by out-of-band firmware.

    摘要翻译: 带内固件执行指令,使指令在一致性结构上发送。 Fabric Snoop逻辑监视针对通过FSI链接附加的支持芯片之一的资源的命令包的一致性结构。 转换逻辑将信息从Fabric数据包转换为FSI协议。 FSI命令通过FSI传输链路发送到预期支持芯片的FSI从站。 FSI接收链路从预期的支持芯片的FSI从站接收响应数据。 转换逻辑将从通过FSI接收链路接收的支持芯片的信息转换为结构协议。 响应分组生成逻辑生成结构响应分组并将其返回到一致性结构上。 支持处理器和支持芯片之间的相同FSI链路允许通过带外固件直接访问支持芯片上的相同资源。

    Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor
    2.
    发明申请
    Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor 失效
    用于间接访问内存映射资源的支持接口以减少带外支持处理器的系统连接的方法

    公开(公告)号:US20060176897A1

    公开(公告)日:2006-08-10

    申请号:US11055404

    申请日:2005-02-10

    IPC分类号: H04L12/66

    CPC分类号: G06F15/7842

    摘要: A method and apparatus are provided for a support interface for memory-mapped resources. A support processor sends a sequence of commands over and FSI interface to a memory-mapped support interface on a processor chip. The memory-mapped support interface updates memory, memory-mapped registers or memory-mapped resources. The interface uses fabric packet generation logic to generate a single command packet in a protocol for the coherency fabric which consists of an address, command and/or data. Fabric commands are converted to FSI protocol and forwarded to attached support chips to access the memory-mapped resource, and responses from the support chips are converted back to fabric response packets. Fabric snoop logic monitors the coherency fabric and decodes responses for packets previously sent by fabric packet generation logic. The fabric snoop logic updates status register and/or writes response data to a read data register. The system also reports any errors that are encountered.

    摘要翻译: 提供了一种用于存储器映射资源的支持接口的方法和装置。 支持处理器将一系列命令和FSI接口发送到处理器芯片上的存储器映射支持接口。 内存映射支持接口更新内存,内存映射寄存器或内存映射资源。 该接口使用结构数据包生成逻辑在由地址,命令和/或数据组成的一致性结构的协议中生成单个命令分组。 Fabric命令转换为FSI协议,并转发到附加的支持芯片以访问内存映射资源,并将来自支持芯片的响应转换回Fabric响应数据包。 Fabric监听逻辑监视一致性结构,并解码先前由Fabric数据包生成逻辑发送的数据包的响应。 织物窥探逻辑更新状态寄存器和/或将响应数据写入读取数据寄存器。 系统还报告遇到的任何错误。

    Method and apparatus for automatic recovery from a failed node concurrent maintenance operation
    4.
    发明申请
    Method and apparatus for automatic recovery from a failed node concurrent maintenance operation 失效
    从失败的节点并发维护操作中自动恢复的方法和装置

    公开(公告)号:US20060187818A1

    公开(公告)日:2006-08-24

    申请号:US11054288

    申请日:2005-02-09

    IPC分类号: H04J1/16

    CPC分类号: G06F11/0793 G06F11/0724

    摘要: A method, apparatus, and computer instructions are provided by the present invention to automatically recover from a failed node concurrent maintenance operation. A control logic is provided to send a first test command to processors of a new node. If the first test command is successful, a second test command is sent to all processors or to the remaining nodes if nodes are removed. If the second command is successful, system operation is resumed with the newly configured topology with either nodes added or removed. If the response is incorrect or a timeout has occurred, the control logic restores values to the current mode register and sends a third test command to check for an error. A fatal system attention is sent to a service processor or system software if an error is encountered. If no error, system operation is resumed with previously configured topology.

    摘要翻译: 本发明提供了一种方法,装置和计算机指令,以便从故障节点并发维护操作中自动恢复。 提供控制逻辑以将第一测试命令发送到新节点的处理器。 如果第一个测试命令成功,则将第二个测试命令发送到所有处理器或其他节点,如果节点被删除。 如果第二个命令成功,则使用添加或删除节点的新配置的拓扑恢复系统操作。 如果响应不正确或发生超时,控制逻辑将恢复到当前模式寄存器的值,并发送第三个测试命令来检查错误。 如果遇到错误,致命的系统注意事项将发送到服务处理器或系统软件。 如果没有错误,则使用先前配置的拓扑恢复系统操作。

    Method to use fabric initialization to test functionality of all inter-chip paths between processors in system
    6.
    发明申请
    Method to use fabric initialization to test functionality of all inter-chip paths between processors in system 失效
    使用结构初始化测试系统中处理器之间所有芯片间路径功能的方法

    公开(公告)号:US20060179356A1

    公开(公告)日:2006-08-10

    申请号:US11054275

    申请日:2005-02-09

    IPC分类号: G06F11/00

    CPC分类号: G06F11/2242

    摘要: A method, apparatus, and program for systematically testing the functionality of all connections in a multi-tiered bus system that connects a large number of processors. Each bus controller is instructed to send a test version of a snoop request to all of the other processors and to wait for the replies. If a connection is bad, the port associated with that connection will time out. Detection of a time-out will cause the initialization process to be halted until the problem can be isolated and resolved.

    摘要翻译: 一种用于系统地测试连接大量处理器的多层总线系统中所有连接的功能的方法,装置和程序。 指示每个总线控制器向所有其他处理器发送窥探请求的测试版本,并等待回复。 如果连接不良,与该连接关联的端口将超时。 检测超时将导致初始化过程停止,直到问题被隔离和解决为止。

    Methods and apparatus for automated noise removal from seismic data
    7.
    发明授权
    Methods and apparatus for automated noise removal from seismic data 有权
    地震数据自动消除噪声的方法和装置

    公开(公告)号:US09250340B2

    公开(公告)日:2016-02-02

    申请号:US13406989

    申请日:2012-02-28

    IPC分类号: G01V1/36

    摘要: Methods and apparatus for noise removal from seismic data. In one embodiment, a seismic data set comprising a plurality of traces is received, and noise metrics for the seismic data set are computed using a set of time and depth windows. The seismic data set is scanned to determine a first set of groups. Each group in the first set comprises at least a first minimum number of neighboring traces for which at least one of the noise metrics is outside a predefined specification. Noise attenuation is applied to the traces in the first set of groups. Other embodiments, aspects, and features are also disclosed.

    摘要翻译: 从地震数据中去除噪声的方法和装置。 在一个实施例中,接收包括多个迹线的地震数据集,并且使用一组时间和深度窗口来计算地震数据集的噪声度量。 扫描地震数据集以确定第一组组。 第一组中的每个组包括至少一个噪声度量超出预定义规范的至少第一最小数量的相邻迹线。 噪声衰减应用于第一组组中的迹线。 还公开了其它实施例,方面和特征。

    Method, apparatus, and computer program product for synchronizing triggering of multiple hardware trace facilities using an existing system bus
    8.
    发明申请
    Method, apparatus, and computer program product for synchronizing triggering of multiple hardware trace facilities using an existing system bus 失效
    用于使用现有系统总线同步触发多个硬件跟踪设施的方法,装置和计算机程序产品

    公开(公告)号:US20060184835A1

    公开(公告)日:2006-08-17

    申请号:US11055870

    申请日:2005-02-11

    IPC分类号: G06F11/00

    CPC分类号: G06F11/2268 G06F11/348

    摘要: A method, apparatus, and computer program product are disclosed in a data processing system for synchronizing the triggering of multiple hardware trace facilities using an existing bus. The multiple hardware trace facilities include a first hardware trace facility and a second hardware trace facility. The data processing system includes a first processor that includes the first hardware trace facility and first processing units that are coupled together utilizing the system bus, and a second processor that includes the second hardware trace facility and second processing units that are coupled together utilizing the system bus. Information is transmitted among the first and second processing units utilizing the system bus when the processors are in a normal, non-tracing mode, where the information is formatted according to a standard system bus protocol. Trigger events are transmitted to the hardware trace facilities utilizing the same standard system bus, where the trigger events are also formatted according to the standard system bus protocol.

    摘要翻译: 在用于使用现有总线触发多个硬件跟踪设备的数据处理系统中公开了一种方法,装置和计算机程序产品。 多个硬件跟踪设备包括第一个硬件跟踪设备和第二个硬件跟踪设备。 数据处理系统包括第一处理器,其包括第一硬件跟踪设备和利用系统总线耦合在一起的第一处理单元,以及包括第二硬件跟踪设备的第二处理器和利用系统耦合在一起的第二处理单元 总线。 当处理器处于正常的非跟踪模式时,利用系统总线在第一和第二处理单元之间传送信息,其中信息根据标准系统总线协议被格式化。 触发事件使用相同的标准系统总线传输到硬件跟踪设备,触发事件也根据标准系统总线协议进行格式化。