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公开(公告)号:US20210397805A1
公开(公告)日:2021-12-23
申请号:US17464044
申请日:2021-09-01
Applicant: Japan Display Inc.
Inventor: Yoshitaka OZEKI , Hayato KURASAWA , Toshinori UEHARA , Koshiro MORIGUCHI
IPC: G06K9/00 , H01L27/12 , H01L29/423 , G06F3/041
Abstract: A detection device is provided and includes substrate; drive electrode provided on substrate; detection electrode provided on substrate and capacitively coupling with drive electrode; first thin film transistor connected to drive electrode and second thin film transistor connected to first thin film transistor, first insulating film and second insulating film both stacked on substrate, wherein first thin film transistor comprises first gate electrode and first semiconductor layer, second thin film transistor comprises second gate electrode and second semiconductor layer, first semiconductor layer and second semiconductor layer are in same layer and are located between first insulating film and second insulating film, first gate electrode opposes first semiconductor layer via first insulating film, second gate electrode opposes second semiconductor layer via second insulating film, and distance from first gate electrode to first semiconductor layer is greater than distance from second gate electrode to second semiconductor layer.
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公开(公告)号:US20240088164A1
公开(公告)日:2024-03-14
申请号:US18244081
申请日:2023-09-08
Applicant: Japan Display Inc
Inventor: Nobutaka OZAKI , Yoshitaka OZEKI , Koshiro MORIGUCHI
IPC: H01L27/12 , G02F1/1343 , G02F1/1362 , G02F1/1368
CPC classification number: H01L27/124 , G02F1/13439 , G02F1/136209 , G02F1/1368
Abstract: A display device including a plurality of pixels arranged in a matrix on a substrate along a first direction and a second direction intersecting the first direction, wherein each of the plurality of pixels includes a transistor, a first transparent conductive layer arranged over the transistor and electrically connected to the transistor, a first insulating layer arranged over the first transparent conductive layer, a second transparent conductive layer arranged in the first insulating layer and electrically connected to the first transparent conductive layer via an opening extending over the plurality of pixels arranged in line in the first direction, a filling member arranged over the second transparent conductive layer to fill the interior of the opening, a third transparent conductive layer arranged on the first insulating layer and the filling member, and a metal layer in contact with the third transparent electrode.
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公开(公告)号:US20230123073A1
公开(公告)日:2023-04-20
申请号:US18068310
申请日:2022-12-19
Applicant: Japan Display Inc.
Inventor: Yoshitaka OZEKI , Nobutaka OZAKI , Koshiro MORIGUCHI
IPC: G02F1/1368 , H01L27/12 , G02F1/1362 , G02F1/136
Abstract: A display device includes a first transistor provided with an oxide semiconductor layer, a first gate wiring facing the oxide semiconductor layer and a first gate insulating layer between the oxide semiconductor layer and the first gate wiring, a first transparent conductive layer provided on at least a first insulating layer on the first transistor, the first transparent conductive layer having an area overlapping the gate wiring and being in contact with the oxide semiconductor layer in a first contact area not overlapping the gate wiring, a second transparent conductive layer provided above at least a second insulating layer on the first transparent conductive layer and being in contact with the first transparent conductive layer at a second contact area overlapping the gate wiring, and a third transparent conductive layer provided between the second transparent conductive layer and the second insulating layer.
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公开(公告)号:US20230324749A1
公开(公告)日:2023-10-12
申请号:US18208489
申请日:2023-06-12
Applicant: Japan Display Inc.
Inventor: Yoshitaka OZEKI , Koshiro MORIGUCHI
IPC: G02F1/1362 , G02F1/1368
CPC classification number: G02F1/136286 , G02F1/1368
Abstract: A display device includes a display area, a frame area surrounding the display area, a plurality of pixel circuit in the display area, a peripheral circuit in the frame area, and wirings connecting the pixel circuit and the peripheral circuit, wherein the peripheral circuit incudes a plurality of switch circuits along a direction away from the display area, a plurality of relay electrodes between the display area and the plurality of switch circuits, and a plurality of connecting wirings connecting each of the plurality of relay electrodes and each of the plurality of switch circuits, and the plurality of relay electrodes is connected to the wirings, and one of the plurality of connecting wirings connecting one of the plurality of switch circuits and one of the plurality of relay electrodes intersects at least one of the other plurality of switch circuits in a plan view.
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公开(公告)号:US20220308379A1
公开(公告)日:2022-09-29
申请号:US17704211
申请日:2022-03-25
Applicant: Japan Display Inc.
Inventor: Yoshitaka OZEKI , Nobutaka OZAKI , Koshiro MORIGUCHI
IPC: G02F1/1368 , G02F1/1362 , H01L27/12
Abstract: A display device includes a first transistor provided with an oxide semiconductor layer, a first gate wiring facing the oxide semiconductor layer and a first gate insulating layer between the oxide semiconductor layer and the first gate wiring, a first transparent conductive layer provided on at least a first insulating layer on the first transistor, the first transparent conductive layer having an area overlapping the gate wiring and being in contact with the oxide semiconductor layer in a first contact area not overlapping the gate wiring, a second transparent conductive layer provided above at least a second insulating layer on the first transparent conductive layer and being in contact with the first transparent conductive layer at a second contact area overlapping the gate wiring, and a third transparent conductive layer provided between the second transparent conductive layer and the second insulating layer.
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公开(公告)号:US20210026215A1
公开(公告)日:2021-01-28
申请号:US17071088
申请日:2020-10-15
Applicant: Japan Display Inc.
Inventor: Koji ISHIZAKI , Yoshitaka OZEKI , Takahiro TAKEUCHI , Koshiro MORIGUCHI , Tomoyasu HIRANO
IPC: G02F1/16766 , G02F1/16756 , G02F1/167 , G02F1/16757 , G02F1/1675
Abstract: According to one embodiment, a display device includes a first conductive layer, a second conductive layer overlapping the first conductive layer, a first capacitive portion located in a same layer as the first conductive layer, a second capacitive portion located in a same layer as the second conductive layer and overlapping the first capacitive portion, a first inorganic insulating film located between the first conductive layer and the second conductive layer and between the first capacitive portion and the second capacitive portion, a drain electrode electrically connected to the second capacitive portion, a pixel electrode electrically connected to the drain electrode.
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公开(公告)号:US20250044657A1
公开(公告)日:2025-02-06
申请号:US18925685
申请日:2024-10-24
Applicant: Japan Display Inc.
Inventor: Yoshitaka OZEKI , Nobutaka OZAKI , Koshiro MORIGUCHI
IPC: G02F1/1368 , G02F1/136 , G02F1/1362 , H01L27/12
Abstract: A display device includes a first transistor provided with an oxide semiconductor layer, a first gate wiring facing the oxide semiconductor layer and a first gate insulating layer between the oxide semiconductor layer and the first gate wiring, a first transparent conductive layer provided on at least a first insulating layer on the first transistor, the first transparent conductive layer having an area overlapping the gate wiring and being in contact with the oxide semiconductor layer in a first contact area not overlapping the gate wiring, a second transparent conductive layer provided above at least a second insulating layer on the first transparent conductive layer and being in contact with the first transparent conductive layer at a second contact area overlapping the gate wiring, and a third transparent conductive layer provided between the second transparent conductive layer and the second insulating layer.
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公开(公告)号:US20240045295A1
公开(公告)日:2024-02-08
申请号:US18490083
申请日:2023-10-19
Applicant: Japan Display Inc.
Inventor: Yoshitaka OZEKI , Nobutaka OZAKI , Koshiro MORIGUCHI
IPC: G02F1/1368 , H01L27/12 , G02F1/1362 , G02F1/136
CPC classification number: G02F1/1368 , H01L27/1225 , G02F1/136286 , G02F1/13606 , H01L27/124
Abstract: A display device includes a first transistor provided with an oxide semiconductor layer, a first gate wiring facing the oxide semiconductor layer and a first gate insulating layer between the oxide semiconductor layer and the first gate wiring, a first transparent conductive layer provided on at least a first insulating layer on the first transistor, the first transparent conductive layer having an area overlapping the gate wiring and being in contact with the oxide semiconductor layer in a first contact area not overlapping the gate wiring, a second transparent conductive layer provided above at least a second insulating layer on the first transparent conductive layer and being in contact with the first transparent conductive layer at a second contact area overlapping the gate wiring, and a third transparent conductive layer provided between the second transparent conductive layer and the second insulating layer.
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公开(公告)号:US20240019745A1
公开(公告)日:2024-01-18
申请号:US18372869
申请日:2023-09-26
Applicant: Japan Display Inc.
Inventor: Yoshitaka OZEKI , Gen KOIDE , Nobutaka OZAKI , Koshiro MORIGUCHI
IPC: G02F1/1368 , G02F1/1343 , G02F1/1362 , H01L27/12 , H01L29/786
CPC classification number: G02F1/1368 , G02F1/134309 , G02F1/136286 , G02F1/136209 , H01L27/124 , H01L29/78633 , H01L29/7869 , H01L27/1225 , G02F1/13439 , G02F1/133308
Abstract: A display device includes a first transistor provided with an oxide semiconductor layer, a first gate electrode facing the oxide semiconductor layer and a first gate insulatin layer between the oxide semiconductor layer and the first gate electrode, a first transparent conductive layer in contact with the oxide semiconductor layer in a first contact area not overlapping the first gate electrode in a plan view, and a second transparent conductive layer connected to the first transparent conductive layer in a second contact area overlapping the first gate electrode in a plan view and provided in a display area of the pixel.
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公开(公告)号:US20230253411A1
公开(公告)日:2023-08-10
申请号:US18136693
申请日:2023-04-19
Applicant: Japan Display Inc.
Inventor: Yoshitaka OZEKI , Nobutaka OZAKI , Koshiro MORIGUCHI
IPC: H01L27/12 , G02F1/1362 , G02F1/1368
CPC classification number: H01L27/1225 , G02F1/136286 , G02F1/1368 , H01L27/124 , G02F1/136213 , G02F1/136227 , G02F1/134309
Abstract: A display device includes a first transistor having an oxide semiconductor layer, a gate wiring opposite the oxide semiconductor layer, a gate insulating layer between the semiconductor layer and the gate wiring, a first insulating layer including at least one insulating layer having a first contact hole outside the gate wiring, a planarization film having a second contact hole overlapping the first contact hole, a first transparent conductive layer including an area overlapping the gate wiring, a second insulating layer covering a side of the second contact hole, a second transparent conductive layer in contact with the oxide semiconductor layer through the first and second contact hole, a first resin filling the first and second contact hole coated by the second transparent conductive layer, and a third transparent conductive layer on the second transparent conductive layer and the first resin.
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