公开(公告)号：US09990881B2

公开(公告)日：2018-06-05

申请号：US15083874

申请日：2016-03-29

Applicant: Japan Display Inc.

Inventor： Hiroyuki Kimura ,  Duzen Peng ,  Ilin Wu

IPC: G09G3/32 ,  G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0216 ,  G09G2310/0251 ,  G09G2310/0254

Abstract: A method of driving a display device includes the following steps: a step of applying a first voltage to a drain of the driving transistor from the first power supply line, while applying an initialization voltage lower than the first voltage to a gate of the driving transistor; a step of applying a voltage higher than the initialization voltage lower than the first voltage to the drain of the driving transistor, and applying a voltage based on a video signal to the gate of the driving transistor; and a step of applying the first voltage to a drain of the driving transistor from the first power supply line and supplying a current to the light emitting element while holding the voltage based on the video signal to the gate of the driving transistor.

公开(公告)号：US09858861B2

公开(公告)日：2018-01-02

申请号：US15016011

申请日：2016-02-04

Applicant: Japan Display Inc.

Inventor： Yutaka Umeda ,  Duzen Peng ,  Ilin Wu ,  Makoto Shibusawa ,  Hiroyuki Kimura

IPC: G06F3/038 ,  G09G5/00 ,  G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2310/0254 ,  G09G2320/0214

Abstract: A method of driving a display device with a plurality of pixels including a video signal wire, a first power supply wire supplied with a first potential, a second power supply wire supplied with a second potential different to the first potential, a light emitting element arranged between the first power supply wire and the second power supply wire, a drive transistor controlling a value of a current supplied to the light emitting element, and a switch arranged between the video signal wire and the drive transistor, and inputting a signal of the video signal wire to a gate terminal of the drive transistor, wherein a minimum gradation level potential is supplied to the video signal wire after a video signal is written to the capacitor of an Nth row pixel until a video signal is written to the capacitor of an Mth (N

公开(公告)号：US20170124946A1

公开(公告)日：2017-05-04

申请号：US15286882

申请日：2016-10-06

Applicant: Japan Display Inc.

Inventor： Ilin WU ,  Duzen Peng

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2310/061 ,  G09G2320/045

Abstract: A display device is provided including a light emitting element, a first transistor formed by a P-MOS arranged between a first power source and the light emitting element, a first switching element connected between a gate electrode of the first transistor and a data line of the first transistor, a second switching element connected between a source electrode of the first transistor and the first power source, a third switching element connected between a drain electrode of the first transistor and an anode of the light emitting element, a first capacitor connected between the gate electrode of the first transistor and the source electrode, and a second capacitor connected between the source electrode of the first transistor and the first power source, wherein in a reset time period the first switching element is turned ON, the second switching element is turned ON, and the third switching element is turned OFF.

公开(公告)号：US09886910B2

公开(公告)日：2018-02-06

申请号：US15341029

申请日：2016-11-02

Applicant: Japan Display Inc.

Inventor： Ilin Wu ,  Duzen Peng

IPC: G09G3/30 ,  G09G3/3291 ,  G09G3/3233 ,  H01L27/32

CPC classification number: G09G3/3291 ,  G09G3/3233 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2320/0214 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/045 ,  H01L27/3225 ,  H01L27/3262 ,  H01L27/3276

Abstract: A display device including a pixel, a drive transistor including a first and a second terminal and a gate, a first switching element controlling a connection between the second terminal and the gate, a storage capacitor of a second terminal connected to the gate, a second switching element controlling a connection between the storage capacitor and a first signal line, a third switching element arranged in parallel with the second switching element and controlling a connection between the storage capacitor and a second signal line, a fourth switching element controlling a connection between the drive transistor and a first power supply line, a light emitting element connected with the drive transistor and a second power supply line, a fifth switching element controlling a connection between the drive transistor and the light emitting element, a sixth switching element controlling a connection between the drive transistor and a third power supply line.