公开(公告)号：US09829734B2

公开(公告)日：2017-11-28

申请号：US14569982

申请日：2014-12-15

Applicant: Japan Display Inc.

Inventor： Seiichi Uramoto

IPC: G02F1/1343 ,  G02F1/1333 ,  G02F1/1368 ,  G02F1/1362

CPC classification number: G02F1/133345 ,  G02F1/134363 ,  G02F2001/134372 ,  G02F2001/136218 ,  G02F2001/13685

Abstract: According to one embodiment, a liquid crystal display device includes an array substrate, a counter-substrate and a liquid crystal layer. The array substrate includes a common electrode, an insulating film, a first pixel electrode, a second pixel electrode and a shield electrode. The insulating film is provided on the common electrode. The first pixel electrode and the second pixel electrode are provided on the insulating film and located with an interval therebetween. The shield electrode is provided on the insulating film and located between the first pixel electrode and the second pixel electrode.

公开(公告)号：US09224756B2

公开(公告)日：2015-12-29

申请号：US14182408

申请日：2014-02-18

Applicant: Japan Display Inc.

Inventor： Seiichi Uramoto

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L29/78621 ,  H01L29/78645 ,  H01L29/78696

Abstract: According to one embodiment, a display device includes a semiconductor including a first channel region, a second channel region, a source region, a drain region, a first region located between the source region and the first channel region, a second region formed between the first channel region and the second channel region, and a third region located between the drain region and the second channel region, wherein the second region has a length of 5 μm or more, which is greater than a length of each of the first region and the third region.

Abstract translation: 根据一个实施例，显示装置包括：半导体，包括第一沟道区，第二沟道区，源极区，漏极区，位于源极区和第一沟道区之间的第一区; 第一沟道区域和第二沟道区域，以及位于漏极区域和第二沟道区域之间的第三区域，其中第二区域具有5μm以上的长度，其大于第一区域和第二沟道区域的长度， 第三个地区。

公开(公告)号：US11762497B2

公开(公告)日：2023-09-19

申请号：US17851101

申请日：2022-06-28

Applicant: Japan Display Inc.

Inventor： Kazune Matsumura ,  Seiichi Uramoto ,  Gen Koide

IPC: G06F3/041 ,  G02F1/1362 ,  G02F1/1333 ,  G06F3/044 ,  G02F1/1368

CPC classification number: G06F3/04164 ,  G02F1/1368 ,  G02F1/13338 ,  G02F1/136286 ,  G06F3/0412 ,  G06F3/0443

Abstract: A peripheral wiring region of a display device includes a first insulating layer on a substrate, a first wiring layer on the first insulating layer, a second insulating layer which is present on the first insulating layer and covers the first wiring layer, and a second wiring layer on the second insulating layer. A plurality of video signal wirings are arranged in the first wiring layer. A plurality of touch detection wirings arranged in a matrix in an X direction and a Y direction and a conductor pattern to which a fixed potential is supplied are formed in the second wiring layer. The conductor pattern is arranged at a position overlapping a part of the plurality of video signal wirings and is capacitively coupled to the part of the plurality of video signal wirings.

公开(公告)号：US09627412B2

公开(公告)日：2017-04-18

申请号：US14789340

申请日：2015-07-01

Applicant: Japan Display Inc.

Inventor： Seiichi Uramoto

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: H01L27/1222 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136218 ,  G02F2001/13629 ,  G02F2001/13685 ,  G02F2201/128 ,  G02F2202/104 ,  H01L27/1237 ,  H01L29/78645

Abstract: The invention provides a high-precision display device having a reliable top- and single-gate TFT causing less current leakage. Part of a gate line 10 that crosses a semiconductor layer 103 acts as a gate electrode to form a TFT. The semiconductor layer 103 is connected to a data line 20 via a through-hole 140 on one side of the TFT and also connected to a contact electrode 107 via a through-hole 120 on the other side of the TFT. A floating electrode 30 is formed between the TFT and the through-hole 140 or between the TFT and the through-hole 120. The floating electrode 30 is formed on a layer above the semiconductor layer 103 with the use of the same material and at the same time as the gate electrode.