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    Display device
    2.
    发明授权
    Display device 有权

    公开(公告)号：US10964728B2

    公开(公告)日：2021-03-30

    申请号：US16851663

    申请日：2020-04-17

    Applicant: Japan Display Inc.

    Inventor： Koji Yamamoto ,  Tatsuya Ishii

    IPC: G09G5/00 ,  H01L27/12 ,  G09G3/36 ,  H01L29/786 ,  H01L27/02 ,  G09G3/3266

    Abstract: To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension.

    Display device
    4.
    发明授权
    Display device 有权

    公开(公告)号：US09658505B2

    公开(公告)日：2017-05-23

    申请号：US14688356

    申请日：2015-04-16

    Applicant: Japan Display Inc.

    Inventor： Tatsuya Ishii ,  Tetsuya Iizuka

    IPC: G02F1/1362 ,  H01L27/12 ,  H01L29/786

    CPC classification number: G02F1/136209 ,  H01L27/1222 ,  H01L27/124 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78675

    Abstract: A display device includes an insulating substrate, a semiconductor layer formed of polycrystalline silicon, including a first impurity area, a second impurity area, and a channel area, an insulating film which covers the semiconductor layer, a gate electrode formed on the insulating film and opposed to the channel area, a source line electrically connected to the first impurity area, an electrode electrically connected to the second impurity area, and a light-shielding film located between the insulating substrate and the semiconductor layer, disposed at a position displaced from a position opposed to the source line, and opposed to an area including a boundary between the channel area and the second impurity area.

    Display device and electronic signboard
    5.
    发明授权
    Display device and electronic signboard 有权

    公开(公告)号：US11545102B2

    公开(公告)日：2023-01-03

    申请号：US17212576

    申请日：2021-03-25

    Applicant: Japan Display Inc.

    Inventor： Tatsuya Ishii

    IPC: G09G5/00 ,  G09G3/36

    Abstract: According to an aspect, a display device includes a plurality of sub-pixels. Each of the sub-pixels includes a memory block including a memory configured to store therein sub-pixel data and a sub-pixel electrode coupled to the memory block. The memory includes first and second transistors configured to store therein the sub-pixel data in accordance with an electrical charge of a floating gate, the first and second transistors include respective drains that are coupled to each other, and a coupling point of the drains is coupled to a node. The sub-pixel electrode is coupled to the node, and each of the sub-pixels is configured to display an image based on a potential of the node.

    Display device and electronic shelf label
    6.
    发明授权
    Display device and electronic shelf label 有权

    公开(公告)号：US11043163B2

    公开(公告)日：2021-06-22

    申请号：US16357482

    申请日：2019-03-19

    Applicant: Japan Display Inc.

    Inventor： Tatsuya Ishii

    IPC: G09G3/3225 ,  H01L27/32

    Abstract: According to an aspect, a display device includes a plurality of sub-pixels arranged in a row direction and a column direction, and each including a memory block that has at least one memory configured to store sub-pixel data. The at least one memory includes: a first transistor including a first floating gate and configured to store the sub-pixel data based on an electric charge in the first floating gate; and a second transistor including a second floating gate electrically coupled to the first floating gate of the first transistor, one of a drain and a source of the second transistor being coupled to a power supply potential, the other of the drain and the source being coupled to a node. Each of the sub-pixels is configured to display an image based on a potential of the node.

    Semiconductor device and display device
    7.
    发明授权
    Semiconductor device and display device 有权

    公开(公告)号：US09911759B2

    公开(公告)日：2018-03-06

    申请号：US15201809

    申请日：2016-07-05

    Applicant: Japan Display Inc.

    Inventor： Tatsuya Ishii

    IPC: H01L21/00 ,  H01L27/12 ,  H01L29/786

    CPC classification number: H01L27/124 ,  H01L27/1222 ,  H01L27/1248 ,  H01L29/78618 ,  H01L29/78645

    Abstract: According to one embodiment, a semiconductor device includes first and second gate electrodes, a semiconductor layer, an output electrode, and an insulating layer. The semiconductor layer includes first source and drain areas, a first channel area facing the first gate electrode, second source and drain areas, and a second channel area facing the second gate electrode. The output electrode outputs voltage produced in the first and second drain areas. In the semiconductor device, the first drain area is in contact with the second drain area. The insulating layer includes a hole portion communicating with one of the first and second drain areas. The output electrode is in contact with one of the first and second drain areas via the hole portion.

    DISPLAY DEVICE AND ELECTRONIC SHELF LABEL
    8.
    发明申请
    DISPLAY DEVICE AND ELECTRONIC SHELF LABEL 审中-公开

    公开(公告)号：US20190295464A1

    公开(公告)日：2019-09-26

    申请号：US16357482

    申请日：2019-03-19

    Applicant: Japan Display Inc.

    Inventor： Tatsuya Ishii

    IPC: G09G3/3225 ,  H01L27/32

    Abstract: According to an aspect, a display device includes a plurality of sub-pixels arranged in a row direction and a column direction, and each including a memory block that has at least one memory configured to store sub-pixel data. The at least one memory includes: a first transistor including a first floating gate and configured to store the sub-pixel data based on an electric charge in the first floating gate; and a second transistor including a second floating gate electrically coupled to the first floating gate of the first transistor, one of a drain and a source of the second transistor being coupled to a power supply potential, the other of the drain and the source being coupled to a node. Each of the sub-pixels is configured to display an image based on a potential of the node.

    Display device
    10.
    发明授权
    Display device 有权

    公开(公告)号：US11563039B2

    公开(公告)日：2023-01-24

    申请号：US17671709

    申请日：2022-02-15

    Applicant: Japan Display Inc.

    Inventor： Koji Yamamoto ,  Tatsuya Ishii

    IPC: G09G5/00 ,  H01L27/12 ,  G09G3/36 ,  H01L29/786 ,  H01L27/02 ,  G09G3/3266

    Abstract: To make the dimension of an electrostatic protection circuit small with the same maintained high in sensitivity. The electrostatic protection circuit is of the configuration that a first diode and a second diode are connected in series, wherein a semiconductor layer owned by each diode is configured to be sandwiched between a gate electrode and a conductive light shielding film. The light shielding film is formed to overlap with the semiconductor layer and has a wider area than the semiconductor layer. This results in having a gate covering the semiconductor layer from an upper side and a back gate covering the semiconductor layer from a lower side, so that the sensitivity can be maintained high irrespective of decreasing the electrostatic protection circuit in dimension.

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