-
1.发明申请ELECTRONIC SYSTEM AND METHOD FOR SELECTIVELY ALLOWING ACCESS TO A SHARED MEMORY 失效选择性地允许访问共享存储器的电子系统和方法公开(公告)号：US20120007871A1
公开(公告)日：2012-01-12
申请号：US13239200
申请日：2011-09-21
IPC分类号： G06F15/167 , G06F13/14
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , G09G2340/02 , G09G2360/18 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435
摘要： An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.
摘要翻译： 公开了电子系统，集成电路和显示方法。 电子系统包含第一设备，存储器以及诸如解码器/编码器的视频/音频压缩/解压缩设备。 电子系统被配置为允许第一设备和视频/音频压缩/解压缩设备共享存储器。 电子系统可以包括在计算机中，在这种情况下，存储器是主存储器。 存储器访问由一个或多个存储器接口实现，存储器直接耦合到总线，或者将第一设备和解码器/编码器直接耦合到总线。 仲裁器基于优先级选择性地提供对存储器的第一设备和/或解码器/编码器的访问。 仲裁器可以单片地集成到存储器接口中。 解码器可以是被配置为符合MPEG-2标准的视频解码器。 存储器可以存储从前一图像获得的预测图像。
-
2.发明授权Video/audio decompression/compression device including an arbiter and method for accessing a shared memory 失效包括用于访问共享存储器的仲裁器和方法的视频/音频解压缩/压缩设备
公开(公告)号：US6058459A
公开(公告)日：2000-05-02
申请号：US702910
申请日：1996-08-26
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435 , G09G2340/02 , G09G2360/18
摘要： An electronic system provides direct access between a first device and a decoder/encoder and a memory. The electronic system can be included in a computer in which case the memory is a main memory. Direct access is accomplished through one or more memory interfaces. Direct access is also accomplished in some embodiments by direct coupling of the memory to a bus, and in other embodiments, by direct coupling of the first device and decoder/encoder to a bus. The electronic system includes an arbiter for determining access for the first device and/or the decoder/encoder to the memory for each access request. The arbiter may be monolithically integrated into a memory interface of the decoder/encoder or the first device. The decoder may be a video decoder configured to decode a bit stream formatted to comply with the MPEG-2 standard. The memory may store predicted images which are obtained from a single preceding image and may also store intra images. Bidirectional images which are directly supplied to a display adapter may be obtained from two preceding intra or predicted images.
摘要翻译： 电子系统提供第一设备和解码器/编码器和存储器之间的直接访问。 电子系统可以包括在计算机中，在这种情况下，存储器是主存储器。 通过一个或多个存储器接口实现直接访问。 在一些实施例中，直接访问还通过将存储器直接耦合到总线，并且在其他实施例中，通过将第一设备和解码器/编码器直接耦合到总线来实现。 电子系统包括用于为每个访问请求确定存储器的第一设备和/或解码器/编码器的访问的仲裁器。 仲裁器可以单片地集成到解码器/编码器或第一设备的存储器接口中。 解码器可以是被配置为解码格式化以符合MPEG-2标准的比特流的视频解码器。 存储器可以存储从单个先前图像获得的预测图像，并且还可以存储图像内部。 直接提供给显示适配器的双向图像可以从两个先前的帧内或预测图像获得。
-
3.发明授权Electronic system and method for selectively allowing access to a shared memory 失效用于选择性地允许访问共享存储器的电子系统和方法公开(公告)号：US08314808B2
公开(公告)日：2012-11-20
申请号：US13239200
申请日：2011-09-21
IPC分类号： G06F13/18 , G06F15/167 , G09G5/36 , G06T9/00
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , G09G2340/02 , G09G2360/18 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435
摘要： An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.
摘要翻译： 公开了电子系统，集成电路和显示方法。 电子系统包含第一设备，存储器以及诸如解码器/编码器的视频/音频压缩/解压缩设备。 电子系统被配置为允许第一设备和视频/音频压缩/解压缩设备共享存储器。 电子系统可以包括在计算机中，在这种情况下，存储器是主存储器。 存储器访问由一个或多个存储器接口实现，存储器直接耦合到总线，或者将第一设备和解码器/编码器直接耦合到总线。 仲裁器基于优先级选择性地提供对存储器的第一设备和/或解码器/编码器的访问。 仲裁器可以单片地集成到存储器接口中。 解码器可以是被配置为符合MPEG-2标准的视频解码器。 存储器可以存储从前一图像获得的预测图像。
-
4.发明授权Electronic system and method for display using a decoder and arbiter to selectively allow access to a shared memory 有权使用解码器和仲裁器进行显示的电子系统和方法，以选择性地允许访问共享存储器公开(公告)号：US06427194B1
公开(公告)日：2002-07-30
申请号：US09539729
申请日：2000-03-30
IPC分类号： G06F1314
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , G09G2340/02 , G09G2360/18 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435
摘要： An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.
摘要翻译： 公开了电子系统，集成电路和显示方法。 电子系统包含第一设备，存储器以及诸如解码器/编码器的视频/音频压缩/解压缩设备。 电子系统被配置为允许第一设备和视频/音频压缩/解压缩设备共享存储器。 电子系统可以包括在计算机中，在这种情况下，存储器是主存储器。 存储器访问由一个或多个存储器接口实现，存储器直接耦合到总线，或者将第一设备和解码器/编码器直接耦合到总线。 仲裁器选择性地向存储器提供第一设备和/或解码器/编码器的访问。 仲裁器可以单片地集成到存储器接口中。 解码器可以是被配置为符合MPEG-2标准的视频解码器。 存储器可以存储从前一图像获得的预测图像。
-
5.发明申请ELECTRONIC SYSTEM AND METHOD FOR SELECTIVELY ALLOWING ACCESS TO A SHARED MEMORY 有权选择性地允许访问共享存储器的电子系统和方法公开(公告)号：US20110122946A1
公开(公告)日：2011-05-26
申请号：US13015385
申请日：2011-01-27
IPC分类号： G06F15/167 , H04N7/26 , H04N7/32
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , G09G2340/02 , G09G2360/18 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435
摘要： An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.
摘要翻译： 公开了电子系统，集成电路和显示方法。 电子系统包含第一设备，存储器以及诸如解码器/编码器的视频/音频压缩/解压缩设备。 电子系统被配置为允许第一设备和视频/音频压缩/解压缩设备共享存储器。 电子系统可以包括在计算机中，在这种情况下，存储器是主存储器。 存储器访问由一个或多个存储器接口实现，存储器直接耦合到总线，或者将第一设备和解码器/编码器直接耦合到总线。 仲裁器基于优先级选择性地提供对存储器的第一设备和/或解码器/编码器的访问。 仲裁器可以单片地集成到存储器接口中。 解码器可以是被配置为符合MPEG-2标准的视频解码器。 存储器可以存储从前一图像获得的预测图像。
-
公开(公告)号：US07898548B2
公开(公告)日：2011-03-01
申请号：US12857455
申请日：2010-08-16
IPC分类号： G06F15/167 , G09G5/36 , G06T9/00
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , G09G2340/02 , G09G2360/18 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435
摘要： An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.
-
7.发明申请ELECTRONIC SYSTEM AND METHOD FOR SELECTIVELY ALLOWING ACCESS TO A SHARED MEMORY 有权选择性地允许访问共享存储器的电子系统和方法公开(公告)号：US20100309211A1
公开(公告)日：2010-12-09
申请号：US12857455
申请日：2010-08-16
IPC分类号： G06F15/167 , H04N7/50
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , G09G2340/02 , G09G2360/18 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435
摘要： An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.
摘要翻译： 公开了电子系统，集成电路和显示方法。 电子系统包含第一设备，存储器以及诸如解码器/编码器的视频/音频压缩/解压缩设备。 电子系统被配置为允许第一设备和视频/音频压缩/解压缩设备共享存储器。 电子系统可以包括在计算机中，在这种情况下，存储器是主存储器。 存储器访问由一个或多个存储器接口实现，存储器直接耦合到总线，或者将第一设备和解码器/编码器直接耦合到总线。 仲裁器基于优先级选择性地提供对存储器的第一设备和/或解码器/编码器的访问。 仲裁器可以单片地集成到存储器接口中。 解码器可以是被配置为符合MPEG-2标准的视频解码器。 存储器可以存储从前一图像获得的预测图像。
-
8.发明申请ELECTRONIC SYSTEM AND METHOD FOR SELECTIVELY ALLOWING ACCESS TO A SHARED MEMORY 有权选择性地允许访问共享存储器的电子系统和方法公开(公告)号：US20090201305A1
公开(公告)日：2009-08-13
申请号：US12424389
申请日：2009-04-15
IPC分类号： G09G5/39
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , G09G2340/02 , G09G2360/18 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435
摘要： An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.
摘要翻译： 公开了电子系统，集成电路和显示方法。 电子系统包含第一设备，存储器以及诸如解码器/编码器的视频/音频压缩/解压缩设备。 电子系统被配置为允许第一设备和视频/音频压缩/解压缩设备共享存储器。 电子系统可以包括在计算机中，在这种情况下，存储器是主存储器。 存储器访问由一个或多个存储器接口实现，存储器直接耦合到总线，或者将第一设备和解码器/编码器直接耦合到总线。 仲裁器基于优先级选择性地提供对存储器的第一设备和/或解码器/编码器的访问。 仲裁器可以单片地集成到存储器接口中。 解码器可以是被配置为符合MPEG-2标准的视频解码器。 存储器可以存储从前一图像获得的预测图像。
-
9.发明授权Electronic system and method for display using a decoder and arbiter to selectively allow access to a shared memory 有权使用解码器和仲裁器进行显示的电子系统和方法，以选择性地允许访问共享存储器公开(公告)号：US07321368B2
公开(公告)日：2008-01-22
申请号：US10174918
申请日：2002-06-19
IPC分类号： G06F15/167 , G09G5/36 , G09G5/39
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , G09G2340/02 , G09G2360/18 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435
摘要： An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.
摘要翻译： 公开了电子系统，集成电路和显示方法。 电子系统包含第一设备，存储器以及诸如解码器/编码器的视频/音频压缩/解压缩设备。 电子系统被配置为允许第一设备和视频/音频压缩/解压缩设备共享存储器。 电子系统可以包括在计算机中，在这种情况下，存储器是主存储器。 存储器访问由一个或多个存储器接口实现，存储器直接耦合到总线，或者将第一设备和解码器/编码器直接耦合到总线。 仲裁器选择性地向存储器提供第一设备和/或解码器/编码器的访问。 仲裁器可以单片地集成到存储器接口中。 解码器可以是被配置为符合MPEG-2标准的视频解码器。 存储器可以存储从前一图像获得的预测图像。
-
10.发明授权Electronic system and method for selectively allowing access to a shared memory 有权用于选择性地允许访问共享存储器的电子系统和方法公开(公告)号：US08054315B2
公开(公告)日：2011-11-08
申请号：US13015385
申请日：2011-01-27
IPC分类号： G06F13/18 , G06F15/167 , G09G5/36 , G06T9/00
CPC分类号： G06T1/60 , G06F13/1605 , G06F13/18 , G06F15/167 , G09G5/001 , G09G5/363 , G09G2340/02 , G09G2360/18 , H04N19/423 , H04N19/427 , H04N19/61 , H04N21/443 , H04N21/4435
摘要： An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.
摘要翻译： 公开了电子系统，集成电路和显示方法。 电子系统包含第一设备，存储器以及诸如解码器/编码器的视频/音频压缩/解压缩设备。 电子系统被配置为允许第一设备和视频/音频压缩/解压缩设备共享存储器。 电子系统可以包括在计算机中，在这种情况下，存储器是主存储器。 存储器访问由一个或多个存储器接口实现，存储器直接耦合到总线，或者将第一设备和解码器/编码器直接耦合到总线。 仲裁器基于优先级选择性地提供对存储器的第一设备和/或解码器/编码器的访问。 仲裁器可以单片地集成到存储器接口中。 解码器可以是被配置为符合MPEG-2标准的视频解码器。 存储器可以存储从前一图像获得的预测图像。
-
-
-
-
-
-
-
-
-
搜索结果
31 条记录 (耗时 0.027 秒)
