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    Silicon carbide and related wide-bandgap transistors on semi-insulating epitaxy for high-speed, high-power applications
    2.
    发明授权
    Silicon carbide and related wide-bandgap transistors on semi-insulating epitaxy for high-speed, high-power applications 有权
    碳化硅和半绝缘外延的相关宽带隙晶体管用于高速，大功率应用

    公开(公告)号：US07432171B2

    公开(公告)日：2008-10-07

    申请号：US11305337

    申请日：2005-12-19

    申请人： Jeffrey B. Casady ,  Michael Mazzola

    发明人： Jeffrey B. Casady ,  Michael Mazzola

    IPC分类号： H01L21/20 ,  H01L21/76

    CPC分类号： H01L29/78603 ,  H01L21/0445 ,  H01L21/7602 ,  H01L21/8258 ,  H01L27/1203 ,  H01L29/1608 ,  H01L29/4908 ,  H01L29/732 ,  H01L29/78609 ,  H01L29/78684 ,  H01L29/802 ,  H01L29/812 ,  Y10S438/917 ,  Y10S438/931

    摘要： A silicon carbide semi-insulating epitaxy layer is used to create power devices and integrated circuits having significant performance advantages over conventional devices. A silicon carbide semi-insulating layer is formed on a substrate, such as a conducting substrate, and one or more semiconducting devices are formed on the silicon carbide semi-insulating layer. The silicon carbide semi-insulating layer, which includes, for example, 4H or 6H silicon carbide, is formed using a compensating material, the compensating material being selected depending on preferred characteristics for the semi-insulating layer. The compensating material includes, for example, boron, vanadium, chromium, or germanium. Use of a silicon carbide semi-insulating layer provides insulating advantages and improved thermal performance for high power and high frequency semiconductor applications.

    摘要翻译： 碳化硅半绝缘外延层用于产生与传统器件相比具有显着性能优点的功率器件和集成电路。 在诸如导电衬底的衬底上形成碳化硅半绝缘层，并且在碳化硅半绝缘层上形成一个或多个半导体器件。 包括例如4H或6H碳化硅的碳化硅半绝缘层使用补偿材料形成，补偿材料根据半绝缘层的优选特性来选择。 补偿材料包括例如硼，钒，铬或锗。 使用碳化硅半绝缘层为高功率和高频半导体应用提供绝缘优势和改善的热性能。

    Silicon carbide: germanium (SiC:Ge) heterojunction bipolar transistor; a new semiconductor transistor for high-speed, high-power applications
    4.
    发明授权
    Silicon carbide: germanium (SiC:Ge) heterojunction bipolar transistor; a new semiconductor transistor for high-speed, high-power applications 有权
    碳化硅：锗（SiC：Ge）异质结双极晶体管; 一种用于高速，大功率应用的新型半导体晶体管

    公开(公告)号：US06410396B1

    公开(公告)日：2002-06-25

    申请号：US09825065

    申请日：2001-04-04

    申请人： Jeffrey B. Casady ,  Michael S. Mazzola ,  Stephen E. Saddow

    发明人： Jeffrey B. Casady ,  Michael S. Mazzola ,  Stephen E. Saddow

    IPC分类号： H01L21331

    CPC分类号： H01L29/7378 ,  H01L29/1608 ,  Y10S438/931

    摘要： Devices and methods for fabricating wholly silicon carbide heterojunction bipolar transistors (HBTs) using germanium base doping to produce suitable emitter/base heterojunctions. In one variation, all device layers are are grown epitaxially and the heterojunction is created by introducing a pseudoalloying material, such as germanium, to form a graded implant. In other variations, the device epitaxial layers are 1) grown directly onto a semi-insulating substrate, 2) the semi-insulating epitaxial layer is grown onto a conducting substrate; 3) the subcollector is grown on a lightly doped p-type epitaxial layer grown on a conducting substrate; and 4) the subcollector is grown directly on a conducting substrate. Another variation comprises a multi-finger HBT with bridging conductor connections among emitter fingers. Yet another variation includes growth of layers using dopants other than nitrogent or aluminum. Yet another variation includes implantation of region within one or more epitaxial layers, rather than use of separate epitaxial layers.

    摘要翻译： 使用锗基掺杂制造完全碳化硅异质结双极晶体管（HBT）以产生合适的发射极/基极异质结的装置和方法。 在一个变型中，外延生长所有器件层，并且通过引入诸如锗的假合金化材料来形成异质结，以形成渐变植入物。 在其他变型中，器件外延层1）直接生长到半绝缘衬底上，2）半导体绝缘外延层生长在导电衬底上; 3）子集电极在生长在导电衬底上的轻掺杂p型外延层上生长; 和4）子集电极直接在导电衬底上生长。 另一变型包括在发射器指状物之间具有桥接导体连接的多指HBT。 另一种变化包括使用除了nit或铝之外的掺杂剂的层的生长。 又一变型包括在一个或多个外延层内注入区域，而不是使用单独的外延层。

    Lateral trench field-effect transistors in wide bandgap semiconductor materials, methods of making, and integrated circuits incorporating the transistors
    5.
    发明授权
    Lateral trench field-effect transistors in wide bandgap semiconductor materials, methods of making, and integrated circuits incorporating the transistors 有权
    宽带隙半导体材料中的横向沟槽场效应晶体管，制造方法和结合晶体管的集成电路

    公开(公告)号：US07242040B2

    公开(公告)日：2007-07-10

    申请号：US11505813

    申请日：2006-08-18

    申请人： Igor Sankin ,  Jeffrey B. Casady ,  Joseph N. Merrett

    发明人： Igor Sankin ,  Jeffrey B. Casady ,  Joseph N. Merrett

    IPC分类号： H01L21/8234 ,  H01L21/336 ,  H01L29/78

    CPC分类号： H01L29/2003 ,  H01L27/098 ,  H01L29/1608 ,  H01L29/47 ,  H01L29/808 ,  H01L29/8122

    摘要： A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.

    摘要翻译： 描述了结型场效应晶体管。 晶体管由宽带隙半导体材料制成。 该器件包括源极，沟道，漂移和漏极半导体层以及p型注入或肖特基栅极区。 源极，沟道，漂移和漏极层可以外延生长。 到源极，栅极和漏极区域的欧姆接触可以形成在晶片的同一侧上。 器件可以具有取决于垂直沟道宽度的不同阈值电压，并且可以针对相同沟道掺杂的耗尽和增强的工作模式实现。 该器件可用于数字，模拟和单片微波集成电路。 还描述了制造包括这些器件的晶体管和集成电路的方法。

    Lateral trench field-effect transistors in wide bandgap semiconductor materials, methods of making, and integrated circuits incorporating the transistors
    6.
    发明授权
    Lateral trench field-effect transistors in wide bandgap semiconductor materials, methods of making, and integrated circuits incorporating the transistors 有权
    宽带隙半导体材料中的横向沟槽场效应晶体管，制造方法和结合晶体管的集成电路

    公开(公告)号：US07119380B2

    公开(公告)日：2006-10-10

    申请号：US10999954

    申请日：2004-12-01

    申请人： Igor Sankin ,  Jeffrey B. Casady ,  Joseph N. Merrett

    发明人： Igor Sankin ,  Jeffrey B. Casady ,  Joseph N. Merrett

    IPC分类号： H01L29/74 ,  H01L29/423 ,  H01L31/111

    CPC分类号： H01L29/2003 ,  H01L27/098 ,  H01L29/1608 ,  H01L29/47 ,  H01L29/808 ,  H01L29/8122

    摘要： A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.

    摘要翻译： 描述了结型场效应晶体管。 晶体管由宽带隙半导体材料制成。 该器件包括源极，沟道，漂移和漏极半导体层以及p型注入或肖特基栅极区。 源极，沟道，漂移和漏极层可以外延生长。 到源极，栅极和漏极区域的欧姆接触可以形成在晶片的同一侧上。 器件可以具有取决于垂直沟道宽度的不同阈值电压，并且可以针对相同沟道掺杂的耗尽和增强的工作模式实现。 该器件可用于数字，模拟和单片微波集成电路。 还描述了制造包括这些器件的晶体管和集成电路的方法。