公开(公告)号：US4768192A

公开(公告)日：1988-08-30

申请号：US33551

申请日：1987-04-01

申请人： Jeffrey S. Pattavina ,  Jai H. Eu

发明人： Jeffrey S. Pattavina ,  Jai H. Eu

IPC分类号： H04J3/06

CPC分类号： H04J3/0605

摘要： A frame synchronization detection system which enables frame synchronization and synchronizing pulses to be provided from at least two formats of DS1 TDM signals, specifically the D4 and extended superframe Fe formats. A first search logic circuit provides an output indicating the onset of a maintenance mode of frame detection when either Fe or D4 patterns are decoded. For the D4 pattern an alternate pattern is decoded and the first search circuit enters the maintenance mode only after both alternate D4 framing patterns are decoded. A second search logic circuit enables the decoding of a subsequent sequence and detection of framing, thereby reducing the probability of false framing. A frame counter which is synchronized upon the detection of a valid framing pattern by the first search circuit continues to supply frame sync pulses until an error detector, which detects whether a predetermined ratio of invalid to valid framing bits occurs, resets the system back to the search mode.

摘要翻译： 一种帧同步检测系统，其能够从至少两种格式的DS1 TDM信号，特别是D4和扩展超帧Fe格式提供帧同步和同步脉冲。 第一搜索逻辑电路提供指示在对Fe或D4图案进行解码时的帧检测的维护模式的开始的输出。 对于D4模式，仅在两个交替的D4成帧模式被解码之后，替代模式被解码，并且第一搜索电路进入维护模式。 第二搜索逻辑电路使得后续序列的解码和成帧检测成为可能，从而降低了伪成帧的可能性。 在由第一搜索电路检测有效成帧模式时同步的帧计数器继续提供帧同步脉冲，直到检测到无效到有效成帧比特的预定比率是否发生的错误检测器将系统重置为 搜索模式。

公开(公告)号：US5404388A

公开(公告)日：1995-04-04

申请号：US25565

申请日：1993-03-03

申请人： Jai H. Eu

发明人： Jai H. Eu

IPC分类号： G01R19/25 ,  H04M1/24 ,  H04M3/30 ,  H04M3/22

CPC分类号： G01R19/25 ,  G01R19/2506 ,  H04M1/24 ,  H04M3/30 ,  H04M3/2209

摘要： In digital measurement of the amplitude and phase of a sinusoidal signal of known frequency by the least square error method, the sampling frequency and sample size are carefully selected to satisfy a certain relationship. Under these conditions, the measurements are simplified and accuracy improved. This technique of measuring a sinusoidal signal is applied to the detection of a load coil in a telephone subscriber's loop circuit. The magnitude and phase of the driving point impedance of the loop are measured through the use of a series of discrete sinusoidal stimulus signals of predetermined frequencies and a digital signal processing technique.

摘要翻译： 通过最小二乘误差法对已知频率的正弦信号的幅度和相位进行数字测量，仔细选择采样频率和采样大小以满足一定的关系。 在这些条件下，简化了测量并提高了精度。 这种测量正弦信号的技术被应用于电话用户环路电路中负载线圈的检测。 通过使用一系列具有预定频率的离散正弦激励信号和数字信号处理技术来测量环路的驱动点阻抗的幅度和相位。