公开(公告)号：US20120284568A1

公开(公告)日：2012-11-08

申请号：US13550468

申请日：2012-07-16

申请人： Jerome F. Duluk, JR. ,  Henry P. Moreton ,  Steven E. Molnar ,  John S. Montrym

发明人： Jerome F. Duluk, JR. ,  Henry P. Moreton ,  Steven E. Molnar ,  John S. Montrym

IPC分类号： G06F11/30

CPC分类号： G06F11/0793 ,  G06F11/0715 ,  G06F11/0751

摘要： A method and system for overriding state information programmed into a processor using an application programming interface (API) avoids introducing error conditions in the processor. An override monitor unit within the processor stores the programmed state for any setting that is overridden so that the programmed state can be restored when the error condition no longer exists. The override monitor unit overrides the programmed state by forcing the setting to a legal value that does not cause an error condition. The processor is able to continue operating without notifying a device driver that an error condition has occurred since the error condition is avoided.

摘要翻译： 使用应用编程接口（API）将编程到处理器中的状态信息进行覆盖的方法和系统避免了在处理器中引入错误状况。 处理器内的覆盖监视单元存储被覆盖的任何设置的编程状态，以便当错误条件不再存在时可以恢复编程状态。 覆盖监视器单元通过强制设置为不引起错误条件的合法值来覆盖编程状态。 处理器能够在不通知设备驱动程序的情况下继续运行，因为避免了错误条件，所以发生了错误状况。

公开(公告)号：US20130298133A1

公开(公告)日：2013-11-07

申请号：US13462649

申请日：2012-05-02

申请人： Stephen JONES ,  Philip Alexander Cuadra ,  Daniel Elliot Wexler ,  Ignacio Llamas ,  Lacky V. Shah ,  Jerome F. Duluk, JR. ,  Christopher Lamb

发明人： Stephen JONES ,  Philip Alexander Cuadra ,  Daniel Elliot Wexler ,  Ignacio Llamas ,  Lacky V. Shah ,  Jerome F. Duluk, JR. ,  Christopher Lamb

IPC分类号： G06F9/50

CPC分类号： G06F9/5027 ,  G06F9/522 ,  G06F2209/483 ,  G06T1/20

摘要： One embodiment of the present invention sets forth a technique for performing nested kernel execution within a parallel processing subsystem. The technique involves enabling a parent thread to launch a nested child grid on the parallel processing subsystem, and enabling the parent thread to perform a thread synchronization barrier on the child grid for proper execution semantics between the parent thread and the child grid. This technique advantageously enables the parallel processing subsystem to perform a richer set of programming constructs, such as conditionally executed and nested operations and externally defined library functions without the additional complexity of CPU involvement.

摘要翻译： 本发明的一个实施例提出了一种用于在并行处理子系统内执行嵌套的内核执行的技术。 该技术涉及使父线程启动并行处理子系统上的嵌套子网格，并使父线程能够在子网格上执行线程同步屏障，以在父线程和子网格之间实现正确的执行语义。 该技术有利地使得并行处理子系统能够执行更丰富的编程结构集合，诸如条件执行和嵌套操作以及外部定义的库函数，而不会增加CPU参与的复杂性。

公开(公告)号：US20130198760A1

公开(公告)日：2013-08-01

申请号：US13360581

申请日：2012-01-27

申请人： Philip Alexander CUADRA ,  Lacky V. Shah ,  Timothy John Purcell ,  Gerald F. Luiz ,  Jerome F. Duluk, JR.

发明人： Philip Alexander CUADRA ,  Lacky V. Shah ,  Timothy John Purcell ,  Gerald F. Luiz ,  Jerome F. Duluk, JR.

IPC分类号： G06F9/46

CPC分类号： G06F9/4881 ,  G06F9/445 ,  G06F2209/484

摘要： One embodiment of the present invention sets forth a technique for automatic launching of a dependent task when execution of a first task completes. Automatically launching the dependent task reduces the latency incurred during the transition from the first task to the dependent task. Information associated with the dependent task is encoded as part of the metadata for the first task. When execution of the first task completes a task scheduling unit is notified and the dependent task is launched without requiring any release or acquisition of a semaphore. The information associated with the dependent task includes an enable flag and a pointer to the dependent task. Once the dependent task is launched, the first task is marked as complete so that memory storing the metadata for the first task may be reused to store metadata for a new task.

摘要翻译： 本发明的一个实施例提出了当执行第一任务完成时自动启动依赖任务的技术。 自动启动从属任务可以减少在从第一个任务到从属任务的转换过程中产生的延迟。 与依赖任务相关联的信息被编码为第一任务的元数据的一部分。 当执行第一任务完成任务调度单元被通知并且从属任务被启动而不需要任何释放或获取信号量时。 与从属任务相关联的信息包括使能标志和指向依赖任务的指针。 一旦启动依赖任务，第一个任务被标记为完整的，以便存储第一个任务的元数据的内存可以被重新用于存储新任务的元数据。

公开(公告)号：US20110157206A1

公开(公告)日：2011-06-30

申请号：US12651192

申请日：2009-12-31

申请人： Jerome F. Duluk, JR. ,  Andrew Tao ,  Bryon Nordquist ,  Henry Moreton

发明人： Jerome F. Duluk, JR. ,  Andrew Tao ,  Bryon Nordquist ,  Henry Moreton

IPC分类号： G09G5/00

CPC分类号： G06T5/001 ,  G06T3/4007 ,  G06T15/04

摘要： Systems and methods for texture processing are presented. In one embodiment a texture method includes creating a sparse texture residency translation map; performing a probe process utilizing the sparse texture residency translation map information to return a finest LOD that contains the texels for a texture lookup operation; and performing the texture lookup operation utilizing the finest LOD. In one exemplary implementation, the finest LOD is utilized as a minimum LOD clamp during the texture lookup operation. A finest LOD number indicates a minimum resident LOD and a sparse texture residency translation map includes one finest LOD number per tile of a sparse texture. The sparse texture residency translation can indicate a minimum resident LOD.

公开(公告)号：US20110157205A1

公开(公告)日：2011-06-30

申请号：US12651141

申请日：2009-12-31

申请人： Andrew Tao ,  Jerome F. Duluk, JR. ,  Jesse D. Hall ,  Henry Moreton

发明人： Andrew Tao ,  Jerome F. Duluk, JR. ,  Jesse D. Hall ,  Henry Moreton

IPC分类号： G09G5/00

CPC分类号： G06T15/04

摘要： Systems and methods for texture processing are presented. In one embodiment a texture method includes creating a sparse texture residency translation map; performing a probe process utilizing the sparse texture residency translation map information to return a finest LOD that contains the texels for a texture lookup operation; and performing the texture lookup operation utilizing the finest LOD. In one exemplary implementation, the finest LOD is utilized as a minimum LOD clamp during the texture lookup operation. A finest LOD number indicates a minimum resident LOD and a sparse texture residency translation map includes one finest LOD number per tile of a sparse texture. The sparse texture residency translation can indicate a minimum resident LOD.

摘要翻译： 提出了纹理处理的系统和方法。 在一个实施例中，纹理方法包括创建稀疏纹理驻留转换图; 使用稀疏纹理驻留转换映射信息来执行探测过程以返回包含用于纹理查找操作的纹素的最好的LOD; 并利用最好的LOD执行纹理查找操作。 在一个示例性实现中，在纹理查找操作期间，最好的LOD用作最小LOD钳位。 最好的LOD数字表示最小驻留LOD，稀疏纹理驻留转换映射包括稀疏纹理的每个瓷砖的最好的LOD数。 稀疏纹理驻留翻译可以指示最小驻留LOD。

公开(公告)号：US20110080416A1

公开(公告)日：2011-04-07

申请号：US12898624

申请日：2010-10-05

申请人： Jerome F. Duluk, JR. ,  Thomas Roell ,  Patrick R. Brown

发明人： Jerome F. Duluk, JR. ,  Thomas Roell ,  Patrick R. Brown

IPC分类号： G06T1/20

CPC分类号： G06T1/20 ,  G06F9/3851 ,  G06F9/3887 ,  G06T15/005 ,  G06T2210/04 ,  G06T2210/52

摘要： One embodiment of the present invention sets forth a technique for splitting a set of vertices into a plurality of batches for processing. The method includes receiving one or more primitives each containing an associated set of vertices. For each of the one or more primitives, one or more vertices are gathered from the set of vertices, the vertices are arranged into one or more batches, the batch is routed to a processing pipeline line to process each batch as a separate primitive, and the one or more batches are processed to produce results identical to those of processing the entire primitive as a single entity.

摘要翻译： 本发明的一个实施例提出了一种用于将一组顶点分割成多个批次以进行处理的技术。 该方法包括接收一个或多个每个包含相关联的顶点集的基元。 对于一个或多个基元中的每一个，从顶点集合中收集一个或多个顶点，将顶点排列成一个或多个批次，批次被路由到处理流水线，以将每个批处理作为单独的原语处理，以及 处理一个或多个批次以产生与作为单个实体处理整个原语的结果相同的结果。

公开(公告)号：US20110242119A1

公开(公告)日：2011-10-06

申请号：US13078878

申请日：2011-04-01

申请人： Jeffrey A. BOLZ ,  Jesse David Hall ,  Jerome F. Duluk, JR. ,  Patrick R. Brown ,  Gregory Scott Palmer

发明人： Jeffrey A. BOLZ ,  Jesse David Hall ,  Jerome F. Duluk, JR. ,  Patrick R. Brown ,  Gregory Scott Palmer

IPC分类号： G06T15/00

CPC分类号： G06T15/005 ,  G06F9/3009 ,  G06F9/3851 ,  G06F9/3879 ,  G06F9/3891 ,  G06T1/00 ,  G06T1/60 ,  G06T15/80

摘要： One embodiment of the present invention sets forth a method for generating work to be processed by a graphics pipeline residing within a graphics processor. The method includes the steps of receiving an indication that a first graphics workload is to be submitted to a command queue associated with the graphics processor, allocating a first portion of shader accessible memory for one or more units of state information that are necessary for processing the first graphics workload, populating the first portion of shader accessible memory with the one or more units of state information, and transmitting to the command queue of the graphics processor the one or more units of state information stored within the first portion of shader accessible memory, wherein the first graphics workload is processed within the graphics pipeline based on the one or more units of state information.

摘要翻译： 本发明的一个实施例提出了一种用于产生要由位于图形处理器内的图形管线处理的工作的方法。 该方法包括以下步骤：接收将要向第一图形工作负载提交到与图形处理器相关联的命令队列的指示，为处理所述图形处理所需的一个或多个状态信息单​​元分配着色器可访问存储器的第一部分 第一图形工作负载，用一个或多个状态信息单​​元填充着色器可访问存储器的第一部分，以及向存储在着色器可访问存储器的第一部分内的一个或多个状态信息单​​元传送到图形处理器的命令队列， 其中基于所述一个或多个状态信息单​​元在所述图形流水线内处理所述第一图形工作负载。

公开(公告)号：US20110084972A1

公开(公告)日：2011-04-14

申请号：US12900329

申请日：2010-10-07

申请人： Jerome F. Duluk, JR. ,  John Christopher Cook ,  Fred Gruner ,  Gregory Scott Palmer

发明人： Jerome F. Duluk, JR. ,  John Christopher Cook ,  Fred Gruner ,  Gregory Scott Palmer

IPC分类号： G06T1/00

CPC分类号： G06T1/20 ,  G06F9/3851 ,  G06F9/3887 ,  G06T15/005 ,  G09G5/363

摘要： One embodiment of the present invention sets forth a technique for executing a software method within a graphics processing unit (GPU) that minimizes the number of clock cycles during which the graphics engine is idled. The function of the software method is performed by a firmware method that is executed by a processor within the GPU. The firmware method is executed to access and optionally update the state stored in the GPU. Unlike execution of a conventional software method, execution of the firmware method does not require an exchange of information between a CPU and the GPU. Therefore, the CPU is not interrupted and throughput of the CPU is not reduced.

摘要翻译： 本发明的一个实施例提出了一种用于在图形处理单元（GPU）内执行软件方法的技术，其最大限度地减少图形引擎在空闲期间的时钟周期数。 软件方法的功能是通过由GPU内的处理器执行的固件方法执行的。 执行固件方法来访问和可选地更新存储在GPU中的状态。 与常规软件方法的执行不同，固件方法的执行不需要CPU和GPU之间的信息交换。 因此，CPU不中断，CPU的吞吐量不降低。

公开(公告)号：US20130152094A1

公开(公告)日：2013-06-13

申请号：US13316344

申请日：2011-12-09

申请人： Jerome F. Duluk, JR. ,  Timothy John Purcell ,  Jesse David Hall ,  Phlip Alexander Cuadra

发明人： Jerome F. Duluk, JR. ,  Timothy John Purcell ,  Jesse David Hall ,  Phlip Alexander Cuadra

IPC分类号： G06F9/46

CPC分类号： G06F9/4843

摘要： One embodiment of the present invention sets forth a technique for error-checking a compute task. The technique involves receiving a pointer to a compute task, storing the pointer in a scheduling queue, determining that the compute task should be executed, retrieving the pointer from the scheduling queue, determining via an error-check procedure that the compute task is eligible for execution, and executing the compute task.

摘要翻译： 本发明的一个实施例提出了一种用于错误检查计算任务的技术。 该技术涉及接收指向计算任务的指针，将指针存储在调度队列中，确定应该执行计算任务，从调度队列检索指针，经由错误检查程序确定计算任务是否符合 执行和执行计算任务。

公开(公告)号：US20130074088A1

公开(公告)日：2013-03-21

申请号：US13236473

申请日：2011-09-19

申请人： Timothy John PURCELL ,  Lacky V. Shah ,  Jerome F. Duluk, JR.

发明人： Timothy John PURCELL ,  Lacky V. Shah ,  Jerome F. Duluk, JR.

IPC分类号： G06F9/46

CPC分类号： G06F9/4881 ,  G06F9/461

摘要： One embodiment of the present invention sets forth a technique for dynamically scheduling and managing compute tasks with different execution priority levels. The scheduling circuitry organizes the compute tasks into groups based on priority levels. The compute tasks may then be selected for execution using different scheduling schemes, such as round-robin, priority, and partitioned priority. Each group is maintained as a linked list of pointers to compute tasks that are encoded as queue metadata (QMD) stored in memory. A QMD encapsulates the state needed to execute a compute task. When a task is selected for execution by the scheduling circuitry, the QMD is removed for a group and transferred to a table of active compute tasks. Compute tasks are then selected from the active task table for execution by a streaming multiprocessor.

摘要翻译： 本发明的一个实施例提出了一种用于动态调度和管理具有不同执行优先级的计算任务的技术。 调度电路基于优先级将计算任务组织成组。 然后可以使用不同的调度方案来选择计算任务，例如循环，优先级和分区优先级。 维护每个组作为指向存储在存储器中的队列元数据（QMD）编码的任务的指针的链表。 QMD封装执行计算任务所需的状态。 当任务被选择用于由调度电路执行时，针对组移除QMD并将其传送到活动计算任务的表。 然后从活动任务表中选择计算任务，以便由流式多处理器执行。