公开(公告)号：US20090069006A1

公开(公告)日：2009-03-12

申请号：US12278618

申请日：2006-12-19

申请人： Jin Soup Joung ,  Young Su Kwak ,  Oh Keol Kwon ,  Dae Hyun Chung

发明人： Jin Soup Joung ,  Young Su Kwak ,  Oh Keol Kwon ,  Dae Hyun Chung

IPC分类号： H04W24/00

CPC分类号： H04W24/08

摘要： The present invention relates, in general, to a method for remotely logging diagnostic monitoring message data on a mobile telecommunication network and, more particularly, to a method for remotely logging diagnostic monitoring message data on a mobile telecommunication network, which, in measuring equipment for diagnosing abnormal service in the mobile telecommunication network, is capable of securely logging the diagnostic monitoring message data of a mobile telecommunication terminal to a remote server while minimizing the load on the mobile telecommunication network.

摘要翻译： 本发明一般涉及用于在移动电信网络上远程记录诊断监视消息数据的方法，更具体地，涉及用于在移动电信网络上远程记录诊断监视消息数据的方法，所述方法在用于 诊断移动电信网络中的异常服务，能够将移动电信终端的诊断监视消息数据安全地记录到远程服务器，同时最小化移动电信网络上的负载。

公开(公告)号：US20090174445A1

公开(公告)日：2009-07-09

申请号：US12318773

申请日：2009-01-08

申请人： Jin Gook Kim ,  Dae Hyun Chung ,  Seung Jun Bae ,  Seung Hoon Lee ,  Won Hwa Shin

发明人： Jin Gook Kim ,  Dae Hyun Chung ,  Seung Jun Bae ,  Seung Hoon Lee ,  Won Hwa Shin

IPC分类号： H03L7/00

CPC分类号： H03L7/0812 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/107 ,  H04L7/0008 ,  H04L7/0091

摘要： A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal as a first input. The phase detector generates a voltage signal indicating a phase difference between a second clock signal output from the controller and the timing signal output from the selection circuit. The semiconductor device further includes a data port, a memory core storing data, and a serializer, in response to the timing signal output from the selection circuit, serializing the data output from the memory core and outputting serialized data to the controller via the data port. The first selection signal is generated by the controller based on at least one of the voltage signal and the data output to the controller via the data port.

摘要翻译： 半导体器件包括选择电路和相位检测器。 选择电路响应于从控制器输出的第一选择信号，作为定时信号输出从控制器输出的第一时钟信号或使用第一时钟信号作为第一输入的PLL的输出信号。 相位检测器产生指示从控制器输出的第二时钟信号与从选择电路输出的定时信号之间的相位差的电压信号。 半导体器件还包括响应于从选择电路输出的定时信号的数据端口，存储数据的存储器核心和串行器，串行化从存储器核心输出的数据，并经由数据端口将串行数据输出到控制器 。 第一选择信号由控制器基于电压信号和通过数据端口输出到控制器的数据中的至少一个来产生。

公开(公告)号：US08306169B2

公开(公告)日：2012-11-06

申请号：US12318773

申请日：2009-01-08

申请人： Jin Gook Kim ,  Dae Hyun Chung ,  Seung Jun Bae ,  Seung Hoon Lee ,  Won Hwa Shin

发明人： Jin Gook Kim ,  Dae Hyun Chung ,  Seung Jun Bae ,  Seung Hoon Lee ,  Won Hwa Shin

IPC分类号： H04L12/66

CPC分类号： H03L7/0812 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/107 ,  H04L7/0008 ,  H04L7/0091

摘要： A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal as a first input. The phase detector generates a voltage signal indicating a phase difference between a second clock signal output from the controller and the timing signal output from the selection circuit. The semiconductor device further includes a data port, a memory core storing data, and a serializer, in response to the timing signal output from the selection circuit, serializing the data output from the memory core and outputting serialized data to the controller via the data port. The first selection signal is generated by the controller based on at least one of the voltage signal and the data output to the controller via the data port.

摘要翻译： 半导体器件包括选择电路和相位检测器。 选择电路响应于从控制器输出的第一选择信号，作为定时信号输出从控制器输出的第一时钟信号或使用第一时钟信号作为第一输入的PLL的输出信号。 相位检测器产生指示从控制器输出的第二时钟信号与从选择电路输出的定时信号之间的相位差的电压信号。 半导体器件还包括响应于从选择电路输出的定时信号的数据端口，存储数据的存储器核心和串行器，串行化从存储器核心输出的数据，并经由数据端口将串行数据输出到控制器 。 第一选择信号由控制器基于电压信号和通过数据端口输出到控制器的数据中的至少一个来产生。