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    Nonvolatile memory cells having split gate structure and methods of fabricating the same
    1.
    发明申请
    Nonvolatile memory cells having split gate structure and methods of fabricating the same 有权

    公开(公告)号：US20050056880A1

    公开(公告)日：2005-03-17

    申请号：US10981115

    申请日：2004-11-04

    申请人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    发明人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    IPC分类号： G11C16/06 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/336 ,  H01L29/76

    CPC分类号： H01L27/11556 ,  H01L27/115

    摘要： Nonvolatile memory cells having a split gate structure and methods of fabricating the same are provided. The nonvolatile memory cells include active regions defined at a predetermined region of a semiconductor substrate. A portion of each of the active regions is etched to form a cell trench region. Insulated floating gates are disposed on a pair of sidewalls parallel with the direction that crosses the active region. A source region is disposed at a bottom surface of the cell trench region. A gap region between the floating gates is filled with a common source line electrically connected to the source region. The common source line is extended along the direction that crosses the active regions. The active regions, which are adjacent to the floating gates, are covered with word lines parallel with the common source line. Drain regions are disposed in the active regions adjacent to the word lines. The drain regions are electrically connected to bit lines that cross over the word lines.

    Nonvolatile memory cells having split gate structure and methods of fabricating the same
    2.
    发明授权
    Nonvolatile memory cells having split gate structure and methods of fabricating the same 有权

    公开(公告)号：US07183154B2

    公开(公告)日：2007-02-27

    申请号：US10980992

    申请日：2004-11-04

    申请人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    发明人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    IPC分类号： H01L21/8238

    CPC分类号： H01L27/11556 ,  H01L27/115

    摘要： Nonvolatile memory cells having a split gate structure and methods of fabricating the same are provided. The nonvolatile memory cells include active regions defined at a predetermined region of a semiconductor substrate. A portion of each of the active regions is etched to form a cell trench region. Insulated floating gates are disposed on a pair of sidewalls parallel with the direction that crosses the active region. A source region is disposed at a bottom surface of the cell trench region. A gap region between the floating gates is filled with a common source line electrically connected to the source region. The common source line is extended along the direction that crosses the active regions. The active regions, which are adjacent to the floating gates, are covered with word lines parallel with the common source line. Drain regions are disposed in the active regions adjacent to the word lines. The drain regions are electrically connected to bit lines that cross over the word lines.

    Nonvolatile memory cells having split gate structure and methods of fabricating the same
    3.
    发明授权
    Nonvolatile memory cells having split gate structure and methods of fabricating the same 有权
    具有分裂栅极结构的非易失性存储单元及其制造方法

    公开(公告)号：US07180124B2

    公开(公告)日：2007-02-20

    申请号：US10981115

    申请日：2004-11-04

    申请人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    发明人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    IPC分类号： H01L21/336

    CPC分类号： H01L27/11556 ,  H01L27/115

    摘要： Nonvolatile memory cells having a split gate structure and methods of fabricating the same are provided. The nonvolatile memory cells include active regions defined at a predetermined region of a semiconductor substrate. A portion of each of the active regions is etched to form a cell trench region. Insulated floating gates are disposed on a pair of sidewalls parallel with the direction that crosses the active region. A source region is disposed at a bottom surface of the cell trench region. A gap region between the floating gates is filled with a common source line electrically connected to the source region. The common source line is extended along the direction that crosses the active regions. The active regions, which are adjacent to the floating gates, are covered with word lines parallel with the common source line. Drain regions are disposed in the active regions adjacent to the word lines. The drain regions are electrically connected to bit lines that cross over the word lines.

    摘要翻译： 提供具有分裂栅极结构的非易失性存储单元及其制造方法。 非易失性存储单元包括限定在半导体衬底的预定区域的有源区。 每个有源区的一部分被蚀刻以形成单元沟槽区。 绝缘浮动栅极设置在与穿过有源区域的方向平行的一对侧壁上。 源区域设置在单元沟槽区域的底表面处。 浮置栅极之间的间隙区填充有与源极区域电连接的公共源极线。 公共源极线沿着与有源区域交叉的方向延伸。 与浮动栅极相邻的有源区域被与公共源极线平行的字线覆盖。 漏极区域设置在与字线相邻的有源区域中。 漏极区域电连接到跨越字线的位线。

    Nonvolatile memory cells having split gate structure and methods of fabricating the same
    4.
    发明申请
    Nonvolatile memory cells having split gate structure and methods of fabricating the same 有权

    公开(公告)号：US20050064655A1

    公开(公告)日：2005-03-24

    申请号：US10980992

    申请日：2004-11-04

    申请人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    发明人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    IPC分类号： G11C16/06 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/8238

    CPC分类号： H01L27/11556 ,  H01L27/115

    摘要： Nonvolatile memory cells having a split gate structure and methods of fabricating the same are provided. The nonvolatile memory cells include active regions defined at a predetermined region of a semiconductor substrate. A portion of each of the active regions is etched to form a cell trench region. Insulated floating gates are disposed on a pair of sidewalls parallel with the direction that crosses the active region. A source region is disposed at a bottom surface of the cell trench region. A gap region between the floating gates is filled with a common source line electrically connected to the source region. The common source line is extended along the direction that crosses the active regions. The active regions, which are adjacent to the floating gates, are covered with word lines parallel with the common source line. Drain regions are disposed in the active regions adjacent to the word lines. The drain regions are electrically connected to bit lines that cross over the word lines.

    Nonvolatile memory cells having split gate structure and methods of fabricating the same
    5.
    发明授权
    Nonvolatile memory cells having split gate structure and methods of fabricating the same 失效
    具有分裂栅极结构的非易失性存储单元及其制造方法

    公开(公告)号：US06867082B2

    公开(公告)日：2005-03-15

    申请号：US10844240

    申请日：2004-05-12

    申请人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    发明人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    IPC分类号： G11C16/06 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/8238

    CPC分类号： H01L27/11556 ,  H01L27/115

    摘要： Nonvolatile memory cells having a split gate structure and methods of fabricating the same are provided. The nonvolatile memory cells include active regions defined at a predetermined region of a semiconductor substrate. A portion of each of the active regions is etched to form a cell trench region. Insulated floating gates are disposed on a pair of sidewalls parallel with the direction that crosses the active region. A source region is disposed at a bottom surface of the cell trench region. A gap region between the floating gates is filled with a common source line electrically connected to the source region. The common source line is extended along the direction that crosses the active regions. The active regions, which are adjacent to the floating gates, are covered with word lines parallel with the common source line. Drain regions are disposed in the active regions adjacent to the word lines. The drain regions are electrically connected to bit lines that cross over the word lines.

    摘要翻译： 提供具有分裂栅极结构的非易失性存储单元及其制造方法。 非易失性存储单元包括限定在半导体衬底的预定区域的有源区。 每个有源区的一部分被蚀刻以形成单元沟槽区。 绝缘浮动栅极设置在与穿过有源区域的方向平行的一对侧壁上。 源区域设置在单元沟槽区域的底表面处。 浮置栅极之间的间隙区填充有与源极区域电连接的公共源极线。 公共源极线沿着与有源区域交叉的方向延伸。 与浮动栅极相邻的有源区域被与公共源极线平行的字线覆盖。 漏极区域设置在与字线相邻的有源区域中。 漏极区域电连接到跨越字线的位线。

    Nonvolatile memory cells having split gate structure and methods of fabricating the same
    6.
    发明授权
    Nonvolatile memory cells having split gate structure and methods of fabricating the same 失效
    具有分裂栅极结构的非易失性存储单元及其制造方法

    公开(公告)号：US06753571B2

    公开(公告)日：2004-06-22

    申请号：US10401666

    申请日：2003-03-28

    申请人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    发明人： Jin-Woo Kim ,  Dong-Jun Kim ,  Min-Soo Cho ,  Dai-Geun Kim

    IPC分类号： H01L29788

    CPC分类号： H01L27/11556 ,  H01L27/115

    摘要： Nonvolatile memory cells having a split gate structure and methods of fabricating the same are provided. The nonvolatile memory cells include active regions defined at a predetermined region of a semiconductor substrate. A portion of each of the active regions is etched to form a cell trench region. Insulated floating gates are disposed on a pair of sidewalls parallel with the direction that crosses the active region. A source region is disposed at a bottom surface of the cell trench region. A gap region between the floating gates is filled with a common source line electrically connected to the source region. The common source line is extended along the direction that crosses the active regions. The active regions, which are adjacent to the floating gates, are covered with word lines parallel with the common source line. Drain regions are disposed in the active regions adjacent to the word lines. The drain regions are electrically connected to bit lines that cross over the word lines.

    摘要翻译： 提供具有分裂栅极结构的非易失性存储单元及其制造方法。 非易失性存储单元包括限定在半导体衬底的预定区域的有源区。 每个有源区的一部分被蚀刻以形成单元沟槽区。 绝缘浮动栅极设置在与穿过有源区域的方向平行的一对侧壁上。 源区域设置在单元沟槽区域的底表面处。 浮置栅极之间的间隙区填充有与源极区域电连接的公共源极线。 公共源极线沿着与有源区域交叉的方向延伸。 与浮动栅极相邻的有源区域用与公共源极线平行的字线覆盖。 漏极区域设置在与字线相邻的有源区域中。 漏极区域电连接到跨越字线的位线。