摘要:
A computing system, more particularly, a computing system including a phase-change memory is provided. The computing system includes a flash memory configured to store data and a phase-change memory configured to store address mapping information for converting a logical address into a physical address. The phase-change memory is configured to store the address mapping information while the computing system is in a power-off state. The computing system may store an address mapping table to manage the flash memory in the phase-change memory.
摘要:
The present invention relates to a mapping information managing apparatus and method for a non-volatile memory supporting different cell types, and more particularly, to a mapping information managing apparatus and method for a non-volatile memory supporting different cell types capable of managing mapping information considering physical characteristics of each cell type in the non-volatile memory supporting different cell types in which bits represented by one cell are different from each other. A mapping information managing apparatus for a non-volatile memory supporting different cell types includes: a user request unit used for a user to request a predetermined operation by using a logical address; a non-volatile memory comprising a plurality of memory areas having different cell types; and a mapping information managing unit storing mapping information on user data written to a second memory area of the plurality of memory areas in a first memory area.
摘要:
Present invention relates to a mapping apparatus and method for a non-volatile memory supporting different cell types, and more particularly, to a mapping apparatus and method for a non-volatile memory supporting different cell types capable of mapping a logical address to a physical address in the non-volatile memory supporting different cell types in which bits represented by unit cells are different from each other.A mapping apparatus for a non-volatile memory supporting different cell types according to an embodiment of the invention includes: a user request unit used for a user to request a predetermined operation by using a logical address; a non-volatile memory comprising a plurality of memory areas having different cell types; and a mapping management unit determining a physical address to be mapped to the logical address of one of the plurality of memory areas on the basis of the logical address used for the requested operation.
摘要:
An apparatus for providing atomicity with respect to a request of a write operation for successive sectors in a flash memory is provided. The apparatus includes a data write module writing data in a main sector of a page and allocating status bits indicating a status of the data write to a spare sector of the page, a write progress managing module overwriting a commit mark in the spare sector allocated with the status bits according to a progress status of the data write, and a validity determining module determining validity of the sectors on the basis of the overwritten commit mark and providing information of the successive sectors.
摘要:
A solid state drive (SSD) including a storage that includes a plurality of flash memories configured to be independently drivable and a controller to receive an input/output (I/O) request from a host, to split the I/O request into a plurality of sub-requests each having a size configured to be capable of being processed independently by each flash memory, and to process the I/O request based on the sub-requests.
摘要:
A solid state drive (SSD) including a storage that includes a plurality of flash memories configured to be independently drivable and a controller to receive an input/output (I/O) request from a host, to split the I/O request into a plurality of sub-requests each having a size configured to be capable of being processed independently by each flash memory, and to process the I/O request based on the sub-requests.
摘要:
An memory device including a data region storing a main data, a first index region storing a count data, and a second index region storing an inverted count data, where the data region, the first index region, and the second index region are included in one logical address.