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公开(公告)号：US20080141075A1
公开(公告)日：2008-06-12
申请号：US11934644
申请日：2007-11-02
申请人： Joerg Kliewer , Manfred Proell , Stephan Schroeder , Georg Eggers , Wolfgang Ruf , Hermann Hass
发明人： Joerg Kliewer , Manfred Proell , Stephan Schroeder , Georg Eggers , Wolfgang Ruf , Hermann Hass
CPC分类号： G11C29/40 , G11C29/1201 , G11C29/26 , G11C29/48 , G11C29/56 , G11C2029/2602 , G11C2029/5602
摘要： An apparatus and methods for testing an integrated device comprising memory a test device are provided. At least two data inputs of the memory are coupled to a data output of the test device. As an alternative, at least two data outputs of the memory are coupled to a data input of the test device. Test data are transferred from the test device to the memory chip and written to memory cells of the memory. Data are read from the memory cells of the memory and transferring from the memory to the test device. The data read from the memory chip are compared with the test data written to the memory in order to identify faults of the memory.
摘要翻译： 提供一种用于测试包括存储器的测试装置的集成装置的装置和方法。 存储器的至少两个数据输入耦合到测试设备的数据输出。 作为替代，存储器的至少两个数据输出耦合到测试设备的数据输入。 测试数据从测试设备传输到存储器芯片并写入存储器的存储单元。 从存储器的存储单元读取数据并从存储器传送到测试设备。 将从存储器芯片读取的数据与写入存储器的测试数据进行比较，以识别存储器的故障。
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2.发明授权Method and apparatus for testing a memory chip using a common node for multiple inputs and outputs 有权用于使用用于多个输入和输出的公共节点来测试存储器芯片的方法和装置公开(公告)号：US07877649B2
公开(公告)日：2011-01-25
申请号：US11934644
申请日：2007-11-02
申请人： Joerg Kliewer , Manfred Proell , Stephan Schroeder , Georg Eggers , Wolfgang Ruf , Hermann Hass
发明人： Joerg Kliewer , Manfred Proell , Stephan Schroeder , Georg Eggers , Wolfgang Ruf , Hermann Hass
IPC分类号： G11C29/00
CPC分类号： G11C29/40 , G11C29/1201 , G11C29/26 , G11C29/48 , G11C29/56 , G11C2029/2602 , G11C2029/5602
摘要： An apparatus and methods for testing an integrated device comprising memory a test device are provided. At least two data inputs of the memory are coupled to a data output of the test device. As an alternative, at least two data outputs of the memory are coupled to a data input of the test device. Test data are transferred from the test device to the memory chip and written to memory cells of the memory. Data are read from the memory cells of the memory and transferring from the memory to the test device. The data read from the memory chip are compared with the test data written to the memory in order to identify faults of the memory.
摘要翻译： 提供一种用于测试包括存储器的测试装置的集成装置的装置和方法。 存储器的至少两个数据输入耦合到测试设备的数据输出。 作为替代，存储器的至少两个数据输出耦合到测试设备的数据输入。 测试数据从测试设备传输到存储器芯片并写入存储器的存储单元。 从存储器的存储单元读取数据并从存储器传送到测试设备。 将从存储器芯片读取的数据与写入存储器的测试数据进行比较，以识别存储器的故障。
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