公开(公告)号：US20070184580A1

公开(公告)日：2007-08-09

申请号：US10597994

申请日：2005-02-02

申请人： Johan Klootwijk ,  Cornelis Timmering ,  Jacob Snijder ,  Ronald Dekker ,  Theodorus Michelsen

发明人： Johan Klootwijk ,  Cornelis Timmering ,  Jacob Snijder ,  Ronald Dekker ,  Theodorus Michelsen

IPC分类号： H01L21/00

CPC分类号： H01L21/6835 ,  H01L2221/68313

摘要： A method of making a comparatively small substrate (12) compatible with manufacturing equipment for a larger-size standard substrate is disclosed. The standard substrate (1) has a surface (10) in which a depression (8) is formed, in which depression the small substrate is connected by means of a layer of a bonding material (13). The depression is formed so as to have a flat bottom (9) extending parallel to the surface. The depression has a depth such that, after the small substrate has been connected with its rear side to the bottom of the depression of the standard substrate by means of the layer of bonding material, the front side (14) of the small substrate forms a free surface which practically coincides with the surface (10) of the carrier wafer. When the standard substrate with the small substrate positioned in the depression is placed into a lithographic stepper, the free surface of the small substrate is placed automatically in a position such that patterns having very small dimensions can be projected onto a photoresist layer formed on said free surface.

摘要翻译： 公开了一种制造与较大尺寸标准基板的制造设备兼容的较小基板（12）的方法。 标准基板（1）具有其中形成有凹部（8）的表面（10），其中小基板通过粘合材料层（13）连接。 凹陷形成为具有平行于表面延伸的平坦的底部（9）。 凹陷具有这样的深度，使得在通过粘合材料层将小基板与其后侧连接到标准基板的凹陷的底部之后，小基板的正面（14）形成 实际上与载体晶片的表面（10）重合的自由表面。 当将具有位于凹陷中的小衬底的标准衬底放置在光刻步进器中时，小衬底的自由表面被自动放置在使得具有非常小的尺寸的图案能够投影到形成在所述自由 表面。

公开(公告)号：US20070222074A1

公开(公告)日：2007-09-27

申请号：US11569175

申请日：2005-05-19

申请人： Erik Petrus Bakkers ,  Robertus Wolters ,  Johan Klootwijk

发明人： Erik Petrus Bakkers ,  Robertus Wolters ,  Johan Klootwijk

IPC分类号： H01L23/52 ,  H01L21/3205

CPC分类号： H01L29/78696 ,  B82Y10/00 ,  B82Y30/00 ,  H01L27/1203 ,  H01L29/0676 ,  H01L29/66439 ,  H01L29/66469 ,  H01L29/66742 ,  H01L29/775 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of providing an electric device with a vertical component and the device itself are disclosed. The electric device may be a transistor device, such as a FET device, with a vertical channel, such as a gate around transistor, or double-gate transistor First an elongate structure, such as a nanowire is provided to a substrate. Subsequently, a first conductive layer separated from the substrate and from the elongate structure by a dielectric layer is provided. Further, a second conductive layer being separated from the first conductive layer by a separation layer is being provided in contact with at least a top section of the elongate structure.

摘要翻译： 公开了一种提供具有垂直分量的电子装置和装置本身的方法。 电子器件可以是诸如FET器件的晶体管器件，具有垂直沟道，例如围绕晶体管的栅极或双栅极晶体管。首先，诸如纳米线的细长结构被提供到衬底。 随后，提供了通过介电层从基板和细长结构分离的第一导电层。 此外，通过分离层与第一导电层分离的第二导电层被提供为与细长结构的至少顶部部分接触。

公开(公告)号：US20070228514A1

公开(公告)日：2007-10-04

申请号：US11579679

申请日：2005-05-03

申请人： Arnoldus Den Dekker ,  Johannes Dijkhuis ,  Nicolas Pulsford ,  Jozef Van Beek ,  Freddy Roozeboom ,  Antonius Lucien Kemmeren ,  Johan Klootwijk ,  Maarten Nollen

发明人： Arnoldus Den Dekker ,  Johannes Dijkhuis ,  Nicolas Pulsford ,  Jozef Van Beek ,  Freddy Roozeboom ,  Antonius Lucien Kemmeren ,  Johan Klootwijk ,  Maarten Nollen

IPC分类号： H01L27/00

CPC分类号： H03H3/00 ,  H03H7/0123

摘要： The electronic device comprises a network of at least one thin-film capacitor and at least one inductor on a first side of a substrate of a semiconductor material. The substrate has a resistivity sufficiently high to limit electrical losses of the inductor and being provided with an electrically insulating surface layer on its first side. A first and a second lateral pin diode are defined in the substrate, each of the pin diodes having a doped p-region, a doped n-region and an intermediate intrinsic region. The intrinsic region of the first pin diode is larger than that of the second pin diode.

摘要翻译： 电子器件包括至少一个薄膜电容器的网络和在半导体材料的衬底的第一侧上的至少一个电感器。 衬底具有足够高的电阻以限制电感器的电损耗，并且在其第一侧上设置有电绝缘表面层。 在衬底中限定第一和第二横向pin二极管，每个pin二极管具有掺杂p区，掺杂n区和中间固有区。 第一pin二极管的本征区域大于第二pin二极管的本征区域。

公开(公告)号：US20060131688A1

公开(公告)日：2006-06-22

申请号：US10544216

申请日：2003-12-16

申请人： Johan Klootwijk

发明人： Johan Klootwijk

IPC分类号： H01L29/00

CPC分类号： H01L21/76264

摘要： The present invention provides a trench isolation structure, comprising a trench groove (4) in a semiconductor slab (1) with a buried layer (2). The trench groove (4) is lined with first insulating material (5), then filled with a first filler material (6) up to the level of the buried layer. Then second insulating material (7), for example an oxide, is preferably applied in the volume which is surrounded by the buried layer (2). The remaining part of the trench groove (4) is either filled with second filler material (8) or with second insulating material. Said structure provides lower capacitive coupling between buried layer (2) edge and substrate (1), with improved thermal behavior.The invention furthermore provides a semiconductor assembly comprising said trench isolation structure and at least one semiconductor device, as well as a method for forming such a trench isolation structure.

摘要翻译： 本发明提供了一种沟槽隔离结构，其包括在具有掩埋层（2）的半导体板（1）中的沟槽（4）。 沟槽（4）衬有第一绝缘材料（5），然后填充到第一填充材料（6）直到掩埋层的高度。 然后，第二绝缘材料（7），例如氧化物，优选地被被埋层（2）包围的体积中施加。 沟槽（4）的剩余部分填充有第二填充材料（8）或填充有第二绝缘材料。 所述结构在掩埋层（2）边缘和衬底（1）之间提供较低的电容耦合，具有改进的热性能。本发明还提供一种包括所述沟槽隔离结构和至少一个半导体器件的半导体组件，以及形成 这样的沟槽隔离结构。

公开(公告)号：US20050280011A1

公开(公告)日：2005-12-22

申请号：US10535483

申请日：2003-10-28

申请人： Johan Klootwijk ,  Jan Slotboom

发明人： Johan Klootwijk ,  Jan Slotboom

IPC分类号： H01L29/73 ,  H01L33/00 ,  H01L21/00 ,  H01L27/15

CPC分类号： H01L29/7313 ,  H01L33/0004

摘要： The invention relates to a radiation-emitting semiconductor device (10) with a semiconductor body (1) and a substrate (2), wherein the semiconductor body (1) comprises a vertical bipolar transistor with an emitter region (3), a base region (4) and a collector region (5), which regions are each provided with a connection region (6, 7, 8), and the border between the base region (4) and the collector region (5) forms a pn-junction and, in operation, at a reverse bias of the pn-junction or at a sufficiently large collector current, avalanche multiplication of charge carriers occurs whereby radiation is generated in the collector region (5). According to the invention, the collector region (5) has a thickness through which transmission of the generated radiation occurs, and the collector region (5) borders on a free surface of the semiconductor body (1). In this way, less of the generated radiation is lost by absorption and the radiation generated is more readily available to serve as an optical signal for, for example, another part of the device (10) or for another device (10). A second sub-region (5B) in the collector region (5) may be made for example with the aid of a gate electrode (11) with which a conducting channel can be induced in the semiconductor body (1). Preferably, a radiation conductor (14) is present on the surface of the latter. The invention further comprises a method of manufacturing a device (10) according to the invention.

摘要翻译： 本发明涉及具有半导体本体（1）和衬底（2）的辐射发射半导体器件（10），其中半导体本体（1）包括具有发射极区域（3）的垂直双极晶体管，基极区域 （4）和集电极区域（5），这些区域各自设置有连接区域（6,7,8），并且基极区域（4）和集电极区域（5）之间的边界形成pn结 并且在操作中，在pn结的反向偏压或集电极电流充足的情况下，发生电荷载流子的雪崩倍增，从而在集电极区域（5）中产生辐射。 根据本发明，集电区（5）具有产生辐射的透射的厚度，并且集电区（5）与半导体本体（1）的自由表面接合。 以这种方式，所产生的辐射的少量通过吸收而损失，并且所产生的辐射更易于用作例如设备（10）的另一部分或另一设备（10）的光信号。 集电极区域（5）中的第二子区域（5B）可以例如借助于在半导体本体（1）中可以引导导电沟道的栅电极（11）制成。 优选地，辐射导体（14）存在于其上的辐射导体（14）的表面上。 本发明还包括一种制造根据本发明的装置（10）的方法。