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公开(公告)号：US4473878A
公开(公告)日：1984-09-25
申请号：US330052
申请日：1981-12-14
CPC分类号： G06F12/1036
摘要： A memory management unit of use in a memory management system. The memory management unit selectively maps a logical address to a respective physical address in accordance with a selected one of a plurality of segment descriptors, each of which defines a logical-to-physical address mapping and a range of address spaces for which such mapping is valid. The mapping is achieved using an improved associative memory circuit. Means are provided to detect mapping conflicts between new segment descriptors and segment descriptors already stored, and to prevent the storage of such conflicting segment descriptors. A method and circuit are provided to coordinate the parallel operation of a plurality of the memory management units or the like.
摘要翻译： 一种在存储器管理系统中使用的存储器管理单元。 存储器管理单元根据多个片段描述符中选择的一个片段描述符来选择性地将逻辑地址映射到相应的物理地址，每个片段描述符定义了逻辑到物理地址映射以及一定范围的地址空间， 有效。 使用改进的关联存储器电路实现映射。 提供了用于检测已经存储的新的段描述符和段描述符之间的映射冲突的手段，并且防止存储这种冲突的段描述符。 提供了一种方法和电路来协调多个存储器管理单元等的并行操作。
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2.发明授权Memory management unit having means for detecting and preventing mapping conflicts 失效存储器管理单元具有用于检测和防止映射冲突的装置
公开(公告)号：US4488256A
公开(公告)日：1984-12-11
申请号：US330051
申请日：1981-12-14
CPC分类号： G06F12/1475 , G06F12/1036
摘要： A memory management unit of use in a memory management system. The memory management unit selectively maps a logical address to a respective physical address in accordance with a selected one of a plurality of segment descriptors, each of which defines a logical-to-physical address mapping and a range of address spaces for which such mapping is valid. The mapping is achieved using an improved associative memory circuit. Means are provided to detect mapping conflicts between new segment descriptors and segment descriptors already stored, and to prevent the storage of such conflicting segment descriptors. A method and circuit are provided to coordinate the parallel operation of a plurality of the memory management units or the like.
摘要翻译： 一种在存储器管理系统中使用的存储器管理单元。 存储器管理单元根据多个段描述符中的所选择的一个段描述符来选择性地将逻辑地址映射到相应的物理地址，每个区段描述符定义了逻辑到物理地址映射以及一定范围的地址空间， 有效。 使用改进的关联存储器电路实现映射。 提供了用于检测已经存储的新的段描述符和段描述符之间的映射冲突的手段，并且防止存储这种冲突的段描述符。 提供了一种方法和电路来协调多个存储器管理单元等的并行操作。
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公开(公告)号：US4493035A
公开(公告)日：1985-01-08
申请号：US447600
申请日：1982-12-07
CPC分类号： G06F9/3863 , G06F11/141
摘要： A data processor capable of automatically storing in an external memory all essential information relating to the internal state thereof upon the detection of an access fault during instruction execution. Upon correction of the cause of the fault, the data processor automatically retrieves the stored state information and restores the state thereof in accordance with the retrieved state information. The data processor then resumes execution of the instruction. The faulted access may be selectively rerun upon the resumption of instruction execution. Means are provided to verify that the retrieved state information is valid.
摘要翻译： 能够在指令执行期间检测到访问故障时能够自动地在外部存储器中存储与其内部状态相关的所有必要信息的数据处理器。 在纠正故障原因时，数据处理器根据检索的状态信息自动检索存储的状态信息并恢复其状态。 数据处理器然后恢复执行该指令。 可以在恢复指令执行时选择性地重新运行故障访问。 提供装置以验证所检索的状态信息是否有效。
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公开(公告)号：US4349873A
公开(公告)日：1982-09-14
申请号：US136593
申请日：1980-04-02
CPC分类号： G06F9/4812 , G06F11/0721 , G06F11/0745 , G06F11/0751 , G06F11/0757
摘要： An integrated circuit data processor receives interrupt level signals from external circuitry which represent a priority level associated with the external circuitry. These signals are compared with signals representing the current operating level of the processor, and an interrupt pending output is generated if (1) the priority level is higher than the operating level; or (2) a maximum priority level is received. Upon the occurrence of the interrupt pending output, the current instruction program is interrupted, and an instruction program associated with the external circuitry is executed. The processor transmits a signal back to the external circuitry indicating that the interrupt request has been granted and receives a vector number from the external circuitry. A first acknowledgment signal from the external circuitry causes the vector number to be latched in the processor. A second acknowledgment signal from the external circuitry causes a vector to be internally generated. Error circuitry is provided to detect spurious interrupts.
摘要翻译： 集成电路数据处理器从外部电路接收表示与外部电路相关联的优先级的中断电平信号。 将这些信号与表示处理器的当前操作电平的信号进行比较，并且如果（1）优先级高于操作电平，则产生中断等待输出; 或（2）接收到最大优先级。 当发生中断等待输出时，当前指令程序中断，并且执行与外部电路相关联的指令程序。 处理器向外部电路发送一个信号，指示中断请求已被授权，并从外部电路接收一个向量号。 来自外部电路的第一确认信号使得矢量编号被锁存在处理器中。 来自外部电路的第二确认信号导致向量在内部产生。 提供错误电路来检测虚假中断。
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公开(公告)号：US08930894B2
公开(公告)日：2015-01-06
申请号：US12247797
申请日：2008-10-08
CPC分类号： G06F17/30235 , G06F8/656 , G06F17/30067 , G06F17/30115 , G06F21/51 , G06F21/6218
摘要： A method for executing an executable file. The method includes executing instructions in the executable file by a first process, receiving a write request from a second process to write to the executable file, generating an anonymous file from the executable file in response to the write request, executing the anonymous file by the first process, and accessing the executable file by the second process.
摘要翻译： 一种用于执行可执行文件的方法。 该方法包括通过第一进程执行可执行文件中的指令，从第二进程接收写入请求以写入可执行文件，响应于写入请求从可执行文件生成匿名文件，执行匿名文件 第一进程，以及通过第二进程访问可执行文件。
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6.发明授权Microcoded processor executing microroutines with a user specified starting microaddress 失效微编码处理器用户指定启动微地址执行微程序
公开(公告)号：US4887203A
公开(公告)日：1989-12-12
申请号：US165409
申请日：1988-02-26
IPC分类号： G01R31/3185 , G06F9/22 , G06F11/267
CPC分类号： G06F11/2236 , G06F9/226 , G01R31/318516
摘要： In a microcoded data processor, an instruction is provided which enables the microaddress for the micromachine to be externally specified. By way of this instruction, the processor may be directed to execute special microcoded routines otherwise unavailable during normal execution. These special microcoded routines may perform useful functions such as testing in an expeditious manner portions of the circuitry of the processor which would otherwise be difficult to test. For example, the functionality of regular structures such as instruction decoding and control programmable logic arrays (PLA's) may either be gated directly out to the tester or internally analyzed before the accumulated results are presented to the tester. On-board instruction caches may also be efficiently exercised to verify that the tag portion properly determines "hits" and "misses", and that the actual instruction cache portion functions accurately.
摘要翻译： 在微编码数据处理器中，提供使外部指定微机器的微地址的指令。 通过该指令，处理器可以被指示执行在正常执行期间不可用的特殊的微编码例程。 这些特殊的微编码例程可以执行有用的功能，例如以快速的方式测试处理器的电路的部分，否则将难以测试。 例如，诸如指令解码和控制可编程逻辑阵列（PLA）的常规结构的功能可以在将累积结果呈现给测试者之前直接门控到测试器或内部分析。 还可以有效地执行车载指令高速缓存以验证标签部分是否适当地确定“命中”和“未命中”，并且实际指令高速缓存部分准确地起作用。
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7.发明授权Data processor having selective breakpoint capability with minimal overhead 失效具有选择性断点能力的数据处理器具有最小的开销
公开(公告)号：US4635193A
公开(公告)日：1987-01-06
申请号：US867404
申请日：1986-05-13
CPC分类号： G06F11/3648 , G06F9/3005 , G06F9/34
摘要： A data processor communicates with a peripheral device and selectively sets breakpoints with minimal overhead. The data processor utilizes an instruction register to store instructions to be executed. Control means communicate with the peripheral device to selectively set a breakpoint in a software program. When repetitions of the breakpoint are encountered, an exception handler is only executed at the desired breakpoint to minimize overhead. A control portion of the processor selectively receives a breakpoint instruction and stores the breakpoint instruction in the instruction register.
摘要翻译： 数据处理器与外围设备进行通信，并以最小的开销选择性地设置断点。 数据处理器利用指令寄存器来存储要执行的指令。 控制装置与外围设备进行通信，以选择性地设置软件程序中的断点。 当遇到断点的重复时，异常处理程序只在所需的断点处执行，以最小化开销。 处理器的控制部分选择性地接收断点指令并将断点指令存储在指令寄存器中。
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公开(公告)号：US4488228A
公开(公告)日：1984-12-11
申请号：US446801
申请日：1982-12-03
CPC分类号： G06F9/3863 , G06F11/141 , G06F9/3824
摘要： A data processor capable of automatically storing in an external memory all essential information relating to the internal state thereof upon the detection of an access fault during instruction execution. Upon correction of the cause of the fault, the data processor automatically retrieves the stored state information and restores the state thereof in accordance with the retrieved state information. The data processor then resumes execution of the instruction. The faulted access may be selectively rerun upon the resumption of instruction execution. Means are provided to verify that the retrieved state information is valid.
摘要翻译： 能够在指令执行期间检测到访问故障时能够自动地在外部存储器中存储与其内部状态相关的所有必要信息的数据处理器。 在纠正故障原因时，数据处理器根据检索的状态信息自动检索存储的状态信息并恢复其状态。 数据处理器然后恢复执行该指令。 可以在恢复指令执行时选择性地重新运行故障访问。 提供装置以验证所检索的状态信息是否有效。
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公开(公告)号：US08856938B2
公开(公告)日：2014-10-07
申请号：US12182790
申请日：2008-07-30
摘要： A method for securely accessing an executable file object includes a step in which a request from the target process to access the executable file object is received by an operating system component, and the object is examined for validity before access is allowed. For objects that cannot be validated, the process is run with privileges bounded by the privilege cap, if the privilege cap permits execution of the object.
摘要翻译： 用于安全地访问可执行文件对象的方法包括步骤，其中来自目标进程的访问可执行文件对象的请求被操作系统组件接收，并且在允许访问之前检查对象的有效性。 对于无法验证的对象，如果权限上限允许执行该对象，该进程将以权限上限的权限运行。
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公开(公告)号：US20100070775A1
公开(公告)日：2010-03-18
申请号：US12233331
申请日：2008-09-18
CPC分类号： G06F21/645
摘要： A method for validating program execution. The method involves identifying a program from a second computer system, obtaining, by a first computer system, a first copy of a page for a file of the program from a second computer system, calculating a hash value for the first copy, storing the first copy in a local memory of the first computer system, storing the hash value for the first copy, and executing the program on the first computer system, where the first copy is removed from the local memory during execution of the program. The method further involves obtaining a second copy of the page from the second computer system, calculating a hash for the second copy, determining whether the hash value for the first copy is equal to the hash value for the second copy, and performing an appropriate action in response to the determination.
摘要翻译： 一种验证程序执行的方法。 该方法包括从第二计算机系统识别程序，由第一计算机系统从第二计算机系统获得用于文件文件的页面的第一副本，计算第一副本的哈希值，存储第一副本 在第一计算机系统的本地存储器中复制，存储用于第一副本的散列值，以及在第一计算机系统上执行程序，其中在执行程序期间将第一副本从本地存储器中移除。 该方法还包括从第二计算机系统获得页面的第二副本，计算第二副本的散列，确定第一副本的哈希值是否等于第二副本的哈希值，以及执行适当的动作 以此作出回应。
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