-
1.发明授权公开(公告)号：US06861968B2
公开(公告)日：2005-03-01
申请号：US10668397
申请日：2003-09-23
CPC分类号： H03M7/3006 , H03M3/344 , H03M3/50 , H03M7/3026
摘要： A digital-to-analog converter (“DAC”) system utilizes notch filters and chopping modulation technology to remove l/f and other baseband noise from a baseband of a signal of interest. Chopping modulation and demodulation circuitry of the DAC operate at a chopping frequency and all harmonics equal to approximately one-half of a digital input signal sampling frequency. A notch filter attenuates signals having frequencies around the chopping frequency prior to chopping to reduce fold back of noise into the baseband due to parasitic modulation. Another notch filter attenuating signals having frequencies around twice the chopping frequency further reduces fold back of noise into the baseband.
摘要翻译： 数模转换器（“DAC”）系统利用陷波滤波器和斩波调制技术从感兴趣信号的基带去除l / f和其他基带噪声。 DAC的斩波调制和解调电路工作在斩波频率，所有谐波等于数字输入信号采样频率的大约一半。 陷波滤波器在斩波之前衰减具有围绕斩波频率的频率的信号，以减少由于寄生调制而将噪声折回到基带。 衰减具有大约斩波频率两倍的频率的信号的另一个陷波滤波器进一步降低了噪声向基带的折回。
-
2.发明授权Signal processing system with baseband noise modulation and noise fold back reduction 有权信号处理系统，具有基带噪声调制和噪声折回公开(公告)号：US06842486B2
公开(公告)日：2005-01-11
申请号：US10425285
申请日：2003-04-29
CPC分类号： H03M3/34 , H03F1/02 , H03F1/26 , H03F3/211 , H03F3/217 , H03F3/2175 , H03F3/38 , H03F2200/331 , H03M3/50
摘要： A digital-to-analog converter (“DAC”) system utilizes chopping modulation technology to remove 1/f and other baseband noise from a baseband of a signal of interest. Chopping modulation and demodulation circuitry of the DAC operate at a chopping frequency equal to approximately one-half of a digital input signal sampling frequency. Chopping at one-half the sampling frequency allows fold back into the baseband of the input signal's frequency components and reduces fold back of noise, such as quantization noise, residing outside the baseband. In a further embodiment, a notch filter attenuates signals having frequencies around the chopping frequency prior to chopping to reduce fold back of noise into the baseband due to parasitic modulation. Coordination of chopping timing also reduces noises in the output of the DAC system.
摘要翻译： 数模转换器（“DAC”）系统利用斩波调制技术从感兴趣信号的基带去除1 / f和其他基带噪声。 DAC的斩波调制和解调电路以等于数字输入信号采样频率的大约一半的斩波频率工作。 以采样频率的一半斩波允许折回到输入信号的频率分量的基带，并减少驻留在基带外的诸如量化噪声的噪声的折返。 在另一实施例中，陷波滤波器在斩波之前衰减具有围绕斩波频率的频率的信号，以减少由于寄生调制而导致的基带的噪声折回。 斩波定时的协调还可以减少DAC系统输出的噪声。
-
公开(公告)号：US20100164631A1
公开(公告)日：2010-07-01
申请号：US12347155
申请日：2008-12-31
IPC分类号： H03F3/04
CPC分类号： H03F3/45955 , H03F3/005
摘要： An electronic system generates at least one floating supply voltage, wherein during operation of the circuit the floating supply voltage tracks a common mode voltage of first and second differential input signals. By tracking the common mode voltage, in at least one embodiment, the floating supply voltage adjusts as the common mode voltage changes. Thus, the floating supply voltages can be based upon the peak-to-peak values of the first and second output signals without factoring in the common mode voltage. In at least one embodiment, the electronic system provides the floating supply voltages to an amplifier. The amplifier amplifies the first and second differential input signals and generates differential output signals. A differential sampling circuit samples the differential output signals to cancel the common mode voltage from the differential output signals. In at least one embodiment, an analog-to-digital converter converts the sampled differential output signals into a digital output signal.
摘要翻译： 电子系统产生至少一个浮动电源电压，其中在电路运行期间，浮动电源电压跟踪第一和第二差分输入信号的共模电压。 通过跟踪共模电压，在至少一个实施例中，浮动电源电压随着共模电压的变化而调整。 因此，浮动电源电压可以基于第一和第二输出信号的峰 - 峰值而不考虑共模电压。 在至少一个实施例中，电子系统向放大器提供浮动电源电压。 放大器放大第一和第二差分输入信号并产生差分输出信号。 差分采样电路对差分输出信号进行采样，以从差分输出信号中消除共模电压。 在至少一个实施例中，模数转换器将采样的差分输出信号转换成数字输出信号。
-
公开(公告)号：US07994863B2
公开(公告)日：2011-08-09
申请号：US12347155
申请日：2008-12-31
IPC分类号： H03F3/04
CPC分类号： H03F3/45955 , H03F3/005
摘要： An electronic system generates at least one floating supply voltage, wherein during operation of the circuit the floating supply voltage tracks a common mode voltage of first and second differential input signals. By tracking the common mode voltage, in at least one embodiment, the floating supply voltage adjusts as the common mode voltage changes. Thus, the floating supply voltages can be based upon the peak-to-peak values of the first and second output signals without factoring in the common mode voltage. In at least one embodiment, the electronic system provides the floating supply voltages to an amplifier. The amplifier amplifies the first and second differential input signals and generates differential output signals. A differential sampling circuit samples the differential output signals to cancel the common mode voltage from the differential output signals. In at least one embodiment, an analog-to-digital converter converts the sampled differential output signals into a digital output signal.
摘要翻译： 电子系统产生至少一个浮动电源电压，其中在电路运行期间，浮动电源电压跟踪第一和第二差分输入信号的共模电压。 通过跟踪共模电压，在至少一个实施例中，浮动电源电压随着共模电压的变化而调整。 因此，浮动电源电压可以基于第一和第二输出信号的峰 - 峰值而不考虑共模电压。 在至少一个实施例中，电子系统向放大器提供浮动电源电压。 放大器放大第一和第二差分输入信号并产生差分输出信号。 差分采样电路对差分输出信号进行采样，以从差分输出信号中消除共模电压。 在至少一个实施例中，模数转换器将采样的差分输出信号转换成数字输出信号。
-
-
-
搜索结果
4 条记录 (耗时 0.025 秒)
