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公开(公告)号：US20120026171A1
公开(公告)日：2012-02-02
申请号：US13269462
申请日：2011-10-07
IPC分类号： G06T15/50
CPC分类号： G06T15/005 , G06T2210/52 , G09G5/363 , G09G5/393 , G09G2360/06 , G09G2360/122
摘要： A parallel array architecture for a graphics processor includes a multithreaded core array including a plurality of processing clusters, each processing cluster including at least one processing core operable to execute a pixel shader program that generates pixel data from coverage data; a rasterizer configured to generate coverage data for each of a plurality of pixels; and pixel distribution logic configured to deliver the coverage data from the rasterizer to one of the processing clusters in the multithreaded core array. A crossbar coupled to each of the processing clusters is configured to deliver pixel data from the processing clusters to a frame buffer having a plurality of partitions.
摘要翻译： 用于图形处理器的并行阵列架构包括包括多个处理簇的多线程核心阵列，每个处理簇包括至少一个可操作以执行从覆盖数据生成像素数据的像素着色器程序的处理核心; 光栅化器，被配置为生成多个像素中的每一个的覆盖数据; 以及像素分布逻辑，被配置为将覆盖数据从光栅化器传送到多线程核心阵列中的处理集群之一。 耦合到每个处理集群的交叉开关被配置为将像素数据从处理集群传送到具有多个分区的帧缓冲器。
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公开(公告)号：US08730249B2
公开(公告)日：2014-05-20
申请号：US13269462
申请日：2011-10-07
CPC分类号： G06T15/005 , G06T2210/52 , G09G5/363 , G09G5/393 , G09G2360/06 , G09G2360/122
摘要： A parallel array architecture for a graphics processor includes a multithreaded core array including a plurality of processing clusters, each processing cluster including at least one processing core operable to execute a pixel shader program that generates pixel data from coverage data; a rasterizer configured to generate coverage data for each of a plurality of pixels; and pixel distribution logic configured to deliver the coverage data from the rasterizer to one of the processing clusters in the multithreaded core array. A crossbar coupled to each of the processing clusters is configured to deliver pixel data from the processing clusters to a frame buffer having a plurality of partitions.
摘要翻译： 用于图形处理器的并行阵列架构包括包括多个处理簇的多线程核心阵列，每个处理簇包括至少一个可操作以执行从覆盖数据生成像素数据的像素着色器程序的处理核心; 光栅化器，被配置为生成多个像素中的每一个的覆盖数据; 以及像素分布逻辑，被配置为将覆盖数据从光栅化器传送到多线程核心阵列中的处理集群之一。 耦合到每个处理集群的交叉开关被配置为将像素数据从处理集群传送到具有多个分区的帧缓冲器。
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3.发明授权公开(公告)号：US07830392B1
公开(公告)日：2010-11-09
申请号：US11612415
申请日：2006-12-18
CPC分类号： G06T15/005 , G06T2210/52 , G09G5/363 , G09G5/393 , G09G2360/06 , G09G2360/122
摘要： The number of crossbars in a graphics processing unit is reduced by assigning each of a plurality of pixels to one of a plurality of pixel shaders based at least in part on a location of each of the plurality of pixels within an image area, generating an attribute value for each of the plurality of pixels using the plurality of pixel shaders, mapping the attribute value of each of the plurality of pixels to one of a plurality of memory partitions, and storing the attribute values in the memory partitions according to the mapping. The attribute value generated by a particular one of the pixel shaders is mapped to the same one of the plurality of memory partitions.
摘要翻译： 至少部分地基于图像区域内的多个像素中的每一个的位置，将多个像素中的每一个分配给多个像素着色器中的每一个来减少图形处理单元中的交叉条的数量，生成属性 使用所述多个像素着色器对所述多个像素中的每一个使用所述多个像素的值，将所述多个像素中的每一个的属性值映射到多个存储器分区中的一个，并且根据所述映射将所述属性值存储在所述存储器分区中。 由特定的像素着色器生成的属性值被映射到多个存储器分区中的相同的一个。
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4.发明授权Position conflict detection and avoidance in a programmable graphics processor 有权可编程图形处理器中的位置冲突检测和避免公开(公告)号：US07053904B1
公开(公告)日：2006-05-30
申请号：US10736006
申请日：2003-12-15
申请人： David B. Kirk , Matthew N. Papakipos , Rui M. Bastos , John Erik Lindholm , Steven E. Molnar , John S. Montrym , Walter E. Donovan
发明人： David B. Kirk , Matthew N. Papakipos , Rui M. Bastos , John Erik Lindholm , Steven E. Molnar , John S. Montrym , Walter E. Donovan
CPC分类号： G06T1/20
摘要： Apparatuses and methods for detecting position conflicts during fragment processing are described. Prior to executing a program on a fragment, a conflict detection unit, within a fragment processor checks if there is a position conflict indicating a RAW (read after write) hazard may exist. A RAW hazard exists when there is a pending write to a destination location that source data will be read from during execution of the program. When the fragment enters a processing pipeline, each destination location that may be written during the processing of the fragment is entered in conflict detection unit. During processing, the conflict detection unit is updated when a pending write to a destination location is completed.
摘要翻译： 描述了在片段处理期间检测位置冲突的装置和方法。 在对片段执行程序之前，片段处理器内的冲突检测单元检查是否存在指示RAW（读写后）危险的位置冲突。 当在程序执行期间存在待读写入到源位置的源数据时，会存在RAW危害。 当片段进入处理流水线时，可以在片段处理期间写入的每个目的地位置被输入到冲突检测单元中。 在处理期间，当完成对目的地位置的待决写入时，冲突检测单元被更新。
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5.发明授权Programmable graphics system and method using flexible, high-precision data formats 有权可编程图形系统和方法采用灵活，高精度的数据格式公开(公告)号：US06954204B2
公开(公告)日：2005-10-11
申请号：US10302465
申请日：2002-11-22
申请人： Harold Robert Feldman Zatz , Walter E. Donovan , John Erik Lindholm , Steven E. Molnar , John S. Montrym
发明人： Harold Robert Feldman Zatz , Walter E. Donovan , John Erik Lindholm , Steven E. Molnar , John S. Montrym
CPC分类号： G06T1/20 , G06T15/005
摘要： A programmable graphics system and method for processing high precision graphics data represented in one or more data formats in one or more passes. Graphics program instructions executed by the system control the processing and format conversion of the data. The program instructions and the data are stored in a memory accessible by the system. Within the memory, contiguous memory entries can contain program instructions or data represented in different formats. The format used to represent a particular data element within the data, is specified in the state information maintained in the system and is used to configure format conversion units within the system. High precision data, such as floating color, is processed by the programmable graphics system and output via a digital to analog converter (DAC) for display.
摘要翻译： 一种可编程图形系统和方法，用于处理以一个或多个遍的一个或多个数据格式表示的高精度图形数据。 由系统执行的图形程序指令控制数据的处理和格式转换。 程序指令和数据存储在系统可访问的存储器中。 在内存中，连续内存条目可以包含以不同格式表示的程序指令或数据。 用于表示数据中特定数据元素的格式在系统中维护的状态信息中指定，用于配置系统内的格式转换单位。 高精度数据，如浮动颜色，由可编程图形系统处理，并通过数模转换器（DAC）输出进行显示。
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6.发明授权Method and system for improving data coherency in a parallel rendering system 有权用于提高并行渲染系统中数据一致性的方法和系统公开(公告)号：US08139069B1
公开(公告)日：2012-03-20
申请号：US11556660
申请日：2006-11-03
IPC分类号： G06F15/80
CPC分类号： G06T15/005 , G06F9/522 , G06T2210/52
摘要： A method and system for improving data coherency in a parallel rendering system is disclosed. Specifically, one embodiment of the present invention sets forth a method for managing a plurality of independently processed texture streams in a parallel rendering system that includes the steps of maintaining a time stamp for a group of tiles of work that are associated with each of the plurality of the texture streams and are associated with a specified area in screen space, and utilizing the time stamps to counter divergences in the independent processing of the plurality of texture streams.
摘要翻译： 公开了一种用于提高并行渲染系统中数据一致性的方法和系统。 具体地，本发明的一个实施例阐述了一种用于在并行渲染系统中管理多个独立处理的纹理流的方法，该方法包括以下步骤：维护与多个相关联的工作的一组瓦片的时间戳 的纹理流并且与屏幕空间中的指定区域相关联，并且利用时间戳来反复在多个纹理流的独立处理中的分歧。
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7.发明授权System and method for generating multiple outputs in a single shader processing pass in a hardware graphics pipeline 有权用于在硬件图形管道中的单个着色器处理通过中生成多个输出的系统和方法公开(公告)号：US06975321B1
公开(公告)日：2005-12-13
申请号：US10430629
申请日：2003-05-05
CPC分类号： G06T15/005
摘要： A system and method are provided for generating multiple output packets in a single processing pass of a shader in a hardware graphics pipeline. Initially, graphics data is received, after which it is processed utilizing the shader of the hardware graphics pipeline to generate a plurality of output packets. The plurality of output packets is outputted from the shader of the hardware graphics pipeline in the single processing pass.
摘要翻译： 提供了一种用于在硬件图形管线中的着色器的单个处理通过中生成多个输出分组的系统和方法。 最初，接收图形数据，然后利用硬件图形流水线的着色器对其进行处理，以产生多个输出分组。 多个输出分组在单个处理过程中从硬件图形流水线的着色器输出。
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8.发明授权Method and system for improving data coherency in a parallel rendering system 有权用于提高并行渲染系统中数据一致性的方法和系统公开(公告)号：US08379033B2
公开(公告)日：2013-02-19
申请号：US13399458
申请日：2012-02-17
IPC分类号： G06F15/80
CPC分类号： G06T15/005 , G06F9/522 , G06T2210/52
摘要： A method and system for improving data coherency in a parallel rendering system is disclosed. Specifically, one embodiment of the present invention sets forth a method for managing a plurality of independently processed texture streams in a parallel rendering system that includes the steps of maintaining a time stamp for a group of tiles of work that are associated with each of the plurality of the texture streams and are associated with a specified area in screen space, and utilizing the time stamps to counter divergences in the independent processing of the plurality of texture streams.
摘要翻译： 公开了一种用于提高并行渲染系统中数据一致性的方法和系统。 具体地，本发明的一个实施例阐述了一种用于在并行渲染系统中管理多个独立处理的纹理流的方法，该方法包括以下步骤：维护与多个相关联的工作的一组瓦片的时间戳 的纹理流并且与屏幕空间中的指定区域相关联，并且利用时间戳来反复在多个纹理流的独立处理中的分歧。
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公开(公告)号：US06992669B2
公开(公告)日：2006-01-31
申请号：US10198707
申请日：2002-07-17
IPC分类号： G06T17/00
CPC分类号： G06T11/40 , G06T15/005 , G06T15/04 , G06T15/50 , G06T15/503 , G06T15/506
摘要： A graphics pipeline system and method are provided for graphics processing. Such system includes a transform module adapted for receiving graphics data. The transform module serves to transform the graphics data from a first space to a second space. Coupled to the transform module is a lighting module which is positioned on the single semiconductor platform for performing lighting operations on the graphics data received from the transform module. Also included is a rasterizer coupled to the lighting module and positioned on the single semiconductor platform for rendering the graphics data received from the lighting module. During use, an antialiasing feature is implemented on the single semiconductor platform to improve a quality of the graphics rendering.
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10.发明授权公开(公告)号：US07683905B1
公开(公告)日：2010-03-23
申请号：US11493484
申请日：2006-07-26
CPC分类号： G06F9/3836 , G06F9/3838 , G06F9/3855 , G06F9/3857
摘要： Apparatuses and methods for detecting position conflicts during fragment processing are described. Prior to executing a program on a fragment, a conflict detection unit, within a fragment processor checks if there is a position conflict indicating a RAW (read after write) hazard may exist. A RAW hazard exists when there is a pending write to a destination location that source data will be read from during execution of the program. When the fragment enters a processing pipeline, each destination location that may be written during the processing of the fragment is entered in conflict detection unit. During processing, the conflict detection unit is updated when a pending write to a destination location is completed.
摘要翻译： 描述了在片段处理期间检测位置冲突的装置和方法。 在对片段执行程序之前，片段处理器内的冲突检测单元检查是否存在指示RAW（读写后）危险的位置冲突。 当在程序执行期间存在待读写入到源位置的源数据时，会存在RAW危害。 当片段进入处理流水线时，可以在片段处理期间写入的每个目的地位置被输入到冲突检测单元中。 在处理期间，当完成对目的地位置的待决写入时，冲突检测单元被更新。
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